scholarly journals Anomalous zero-temperature magnetopolaronic blockade of resonant electron tunneling in Majorana-resonant-level single-electron transistor

2018 ◽  
Vol 21 (2) ◽  
pp. 23703
Author(s):  
Skorobagatko
Keyword(s):  
Electron Tunneling ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Zero Temperature ◽  
Resonant Level ◽  
Resonant Electron

scholarly journals First-Principles Modeling of the Smallest Molecular Single Electron Transistor

2015 ◽  
Vol 2 (1) ◽  
pp. 33-39
Author(s):  
Mudassir M. Husain ◽  
Maneesh Kumar
Keyword(s):  
First Principles ◽  
Electron Tunneling ◽  
Energy Levels ◽  
Stability Diagram ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Discrete Energy ◽  
Weakly Coupled ◽  
Electron Transport Properties ◽  
Charging Energy

Using first-principles method the charging energy has been calculated; of the smallest single electron transistor (SET) consisting of only two carbon atoms while operating in coulumb blockade regime. The ethyne (C2H2) molecule is acting like a quantum dot (with discrete energy levels) and is weakly coupled to the gold electrodes (continuum). The quantum effects are significant and the conduction of current takes place through incoherent method via electron tunneling. The electronic levels of the molecule determine the electron transport properties. The molecule may be in several charged states from +2 to -2. It has been observed that the HOMO-LUMO gap is strongly reduced in solid state environment with metallic electrodes, as compared to the vacuum. This reduction is attributed to the image charges generated in the source and drain electrodes. This results in strong localization of charges in the molecule, a phenomenon addressed earlier. The charging energy has been calculated in vacuum and in SET environment. The interaction between molecule and the electrodes is treated self-consistently through Poisson equation. The charge stability diagram of the smallest molecular SET has been obtained.

scholarly journals Electromechanical Characteristics by a Vertical Flip of C70 Fullerene Prolate Spheroid in a Single-Electron Transistor: Hybrid Density Functional Methods

Nanomaterials ◽  
2021 ◽  
Vol 11 (11) ◽  
pp. 2995
Author(s):  
Jong Woan Choi ◽  
Changhoon Lee ◽  
Eiji Osawa ◽  
Ji Young Lee ◽  
Jung Chul Sur ◽  
...  
Keyword(s):  
Density Functional ◽  
Electron Tunneling ◽  
Major Axis ◽  
Prolate Spheroid ◽  
Molecular Orbitals ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Gate Electrode ◽  
Axis Orientation ◽  
Hybrid Density Functional

In this study, the B3LYP hybrid density functional theory was used to investigate the electromechanical characteristics of C70 fullerene with and without point charges to model the effect of the surface of the gate electrode in a C70 single-electron transistor (SET). To understand electron tunneling through C70 fullerene species in a single-C70 transistor, descriptors of geometrical atomic structures and frontier molecular orbitals were analyzed. The findings regarding the node planes of the lowest unoccupied molecular orbitals (LUMOs) of C70 and both the highest occupied molecular orbitals (HOMOs) and the LUMO of the C70 anion suggest that electron tunneling of pristine C70 prolate spheroidal fullerene could be better in the major axis orientation when facing the gate electrode than in the major (longer) axis orientation when facing the Au source and drain electrodes. In addition, we explored the effect on the geometrical atomic structure of C70 by a single-electron addition, in which the maximum change for the distance between two carbon sites of C70 is 0.02 Å.

A PSPICE Fast Model for the Single Electron Transistor

2019 ◽  
pp. 08-23
Author(s):  
Lobna Osman ◽  
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
High Speed ◽  
Electron Tunneling ◽  
Electronic Devices ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Electrical Characteristics ◽  
Nanoelectronic Devices ◽  
Low Power Dissipation

Motivated by the merits of low power dissipation, ultra-small size, and high speed of many nanoelectronic devices, They have been demonstrated to ensure future progress. Single-electron devices became one of the most important nanoelectronic devices due to their interesting electrical characteristics and behavior. Many research efforts moved to describe their electrical characteristics to use them with conventional electronic devices. This paper deals with modeling and simulation of such new electronic devices. This paper presents a model for the Single Electron Transistor (SET) and its application in simulating hybrid SET/MOS ADC and DAC converters. This model uses the orthodox theory of single-electron tunneling and determines the average current through the transistor. The proposed model is more flexible that is valid for a large range of drain to source voltage, valid for single or multi-gate SET and symmetric or asymmetric SET. Finally, using this model with MOSFET transistors to realize multi-bit Analog-to-Digital Converters (ADC) and Digital-to-Analog Converters (DAC). The hybrid n-bit DAC nano-circuits are simulated for (n=4 and 8) using Orcad Capture PSPICE. The performance of the SET/MOS hybrid n-bit ADC circuits were simulated (for n=3 and 8). The results show that the transient operation of hybrid SET/MOS circuit-based DAC could successfully operate at 1000K while ADC could operate at 144K. This performance can be compared with the pure SET circuits, the proposed converter circuits have been enhanced in the drive capability and the power dissipation. Compared with the other SET/MOS hybrid circuit, the implemented converter circuits have low simulation time, high speed, high load drivability, and low power dissipation.

Quantum Current Modelling of Single Electron Transistors with N Potential Barrier

2019 ◽  
Vol 11 (12) ◽  
pp. 1261-1265
Author(s):  
Seyed Norollah Hedayat ◽  
Seyedeh Sahar Hedayat
Keyword(s):  
Electron Tunneling ◽  
Structural Parameters ◽  
Single Electron ◽  
Tunneling Effect ◽  
Single Electron Transistor ◽  
Single Electron Transistors ◽  
Current Voltage ◽  
Single Electron Tunneling ◽  
Quantum Current ◽  
New Type

The single electron transistor is a new type of switching device that uses controlled electron tunneling to amplify current. In this paper, we focus on some basic device characteristics like, single electron tunneling effect on which this single electron transistor works. In this research, transmission coefficient model of a single electron transistor with quantum dot arrays constraints is checked. Then, the current of the transistor is modeled on quantum dots. Finally, current–voltage characteristic based on quantum transport and structural parameters are analyzed.

scholarly journals Parallel Comparator based voltmeter using Single Electron Tunneling Transistor

2021 ◽  
pp. 251-266
Author(s):  
Anup Kumar Biswas
Keyword(s):  
Electron Tunneling ◽  
Block Diagram ◽  
Voltage Divider ◽  
Input Voltage ◽  
Single Electron ◽  
Small Range ◽  
Single Electron Transistor ◽  
Digital Output ◽  
In Series ◽  
Analog Voltage

By manipulating an electron that tunnels the tunnel junction of a single electron transistor, one will be able to reach a standard output logic “1” or logic “0”. The operation of the Single Electron Transistor (SET) is depending upon the bias voltage as well as the input signal(s). By varying the input voltage levels of a SET, the output voltage levels can significantly be changed on the basis of tunneling of an electron whether tunneling happened or not. As our concentration is the measuring of an unknown voltage, we are to implement a voltmeter system to provide a digital output of 3 bits whenever an unknown input voltage is kept in touching in the input terminal. A reference/standard voltage (say 8mV) will be connected in series with eight resistances ( 8 Rs) for the purpose of making a seven threshold voltages, for 7 comparators, in an ascending order of values from ground to reference voltage for seven comparators which are used in this present work. The voltmeter implemented consists of (i) a voltage divider, (ii) a set of seven comparators, (iii) seven Exclusive-OR gates and (iv) three 4-input OR gates. The concepts of implementing “Parallel Comparator based voltmeter” is discussed in two ways (i) by classical block diagram and (ii) using Single electron transistor based circuit. The measuring of an input analog voltage will not be the same as the digital output value. A 3-bit output indicates that the input analog voltage must lie on within a particular small range of voltage. The encoder circuit which is connected to the outputs of the comparators is hard to construct whenever the three terminals output are expressed with the output variables (Wi) of the comparators. For simple and user-friendly circuit, the outputs (Wi) of the comparators are modified to Di variables so as to get the same 3-bit encoder/voltmeter output. For this purpose, 7 extra component called 2-input XORs based on SET are used. Seven such XORs are set, and the output of them are passed to three 4-input OR gates according to the required logic expressions. It is found that all the output data of the voltmeter are coherently matched with the theoretical aspects. Processing delays are found out for all circuits. Power consumptions of all of them are shown in tabular and graphical forms. All the circuit we are intending to make are provided in due places with their logic circuit or simulation set and the simulation results are provided as well. Different truth tables are given for keeping track of whether input-output relationships matches with the theoretical results. We have thought of whether the present work circuits are faster or slower than the circuits of CMOS based-circuits. The power consumed at the time of tunneling event for a circuit is measured and sensed that it exists in the range between 1×10^(-18) Joules to 22×10^(-18)Joules which is very small amount. All the combinational circuits presented in this work are of SET-based.

scholarly journals Quantum Physics Based Analytical Modeling of Drain Current of Single Electron Transistor with Island Made of Zigzag-Tungsten Disulfide Nanoribbon

2020 ◽  
Keyword(s):  
Coulomb Blockade ◽  
Quantum Physics ◽  
Electron Tunneling ◽  
Drain Current ◽  
Tungsten Disulfide ◽  
Atomic Scale ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Ultra Low Power ◽  
Zigzag Pattern

Among many emerging nanoelectronic devices, single-electron transistor (SET) is one of the frontier device architectures that can offer high operating speed at an ultra-low power consumption. It exploits controlled electron tunneling to amplify current and retains its scalability even on an atomic scale. A new island based SET device architecture is proposed which is made of monolayer tungsten disulfide nanoribbon (WS2 NR) in zigzag pattern. The quantum physics based analytical model is developed in order to investigate the tunnelling drain current flowing through the proposed WS2 NR SET. It has been observed from the simulation study that the device current did not struggle in the coulomb blockade region whereas outside this region drain current value gradually decreases for longer nanoribbon likely due to formation of wider potential well in the island regime which helps to drop the rate of tunnelling electrons.

scholarly journals Analysis of Triple Quantum Dots Single Electron Transistor (TQD-SET) for Various Configuration

2020 ◽  
Vol 2 (2) ◽  
pp. 56
Author(s):  
Stephanus Hanurjaya ◽  
Miftahul Anwar ◽  
Meiyanto Eko Sulistyo ◽  
Irwan Iftadi ◽  
Subuh Pramono
Keyword(s):  
Quantum Dots ◽  
Coulomb Blockade ◽  
Electron Tunneling ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Single Electron Transistors ◽  
Single Electron Tunneling ◽  
Triple Quantum Dots ◽  
Working Principle ◽  
Electron Transistors

<p class="Abstract">Single electron transistor (SET) has high potential for the development of quantum computing technologies in order to provide low power consumption electronics. For that purpose, many studies have been conducted to develop SET using dopants as quantum dots (QD). The working principle of SET basically is a single electron tunneling one by one through tunnel junction based on the coulomb blockade effect. This research will simulate various configurations of triple quantum dots single electron transistors (TQD-SET) using SIMON 2.0 with an experimental approach of MOSFET with dopants QD. The configurations used are series, parallel, and triangle configuration. The mutual capacitance (Cm), tunnel junctions (TJ), and temperature values of TQD-SET configurations are varied. The I-V characteristics are observed and analyzed for typical source-drain voltage (Vsd). it is found that the TQD series requires larger Vsd than parallel or triangular TQDs. On the other hands, the current in parallel TQD tends to be stable even though Cm is changed, and the current in the TQD triangle is strongly influenced by the Cm. By comparing these three configurations, it is observed that the tunnelling rate is higher for parallel TQD due to higher probability current moves through three dots by applying Vds.</p>

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