scholarly journals Area Efficient, High Speed EBCOT Architecture for Digital Cinema

2012 ◽  
Vol 2012 ◽  
pp. 1-9
Author(s):  
Kishor Sarawadekar ◽  
Swapna Banerjee

Embedded block coding with optimised truncation (EBCOT) is a key algorithm in digital cinema (DC) distribution system. Though several high speed EBCOT architectures exist, all are not capable of meeting the DC specifications. To meet this challenge, the relationship between contents of a code block (CB) and context generation is studied. Our study reveals that it is difficult to predict number of contexts generated in a bit plane. Even the nature of number of contexts produced varies from CB to CB. In such a situation, it is difficult to ensure the frame rate requirement of DC. To avoid this uncertainty, a pass parallel, concurrent sample coding EBCOT architecture is proposed in this paper. It is capable of encoding one bit plane in 288 clock cycles under any circumstances. This design is prototyped on XC4VLX80-12 FPGA with multiple clock domains. After synthesizing, the bit plane coder (BPC) and MQ coder operate at 450 MHz and 123 MHz, respectively. In order to maintain synchronism among different clock domains, the BPC and MQ coder units are operated at 432 MHz and 108 MHz, respectively. This entails that the proposed design is capable of processing size 57 DC frames in a second.

Author(s):  
Amol Baban Manghale ◽  
Girish Kashinath Mahajan ◽  
Gaurav Prabhakar Tembhurnikar

2011 ◽  
Vol 131 (4) ◽  
pp. 362-368 ◽  
Author(s):  
Yasunobu Yokomizu ◽  
Doaa Mokhtar Yehia ◽  
Daisuke Iioka ◽  
Toshiro Matsumura

2018 ◽  
Author(s):  
J. Lindsay ◽  
P. Trimby ◽  
J. Goulden ◽  
S. McCracken ◽  
R. Andrews

Abstract The results presented here show how high-speed simultaneous EBSD and EDS can be used to characterize the essential microstructural parameters in SnPb solder joints with high resolution and precision. Analyses of both intact and failed solder joints have been carried out. Regions of strain localization that are not apparent from the Sn and Pb phase distribution are identified in the intact bond, providing key insights into the mechanism of potential bond failure. In addition, EBSD provides a wealth of quantitative detail such as the relationship between parent Sn grain orientations and Pb coarsening, the morphology and distribution of IMCs on a sub-micron scale and accurate grain size information for all phases within the joint. Such analyses enable a better understanding of the microstructural developments leading up to failure, opening up the possibility of improved accelerated thermal cycling (ATC) testing and better quality control.


IEEE Access ◽  
2021 ◽  
Vol 9 ◽  
pp. 19696-19706
Author(s):  
Jinggang Yang ◽  
Xiaolong Xiao ◽  
Wei Su ◽  
Xinyao Si ◽  
Jiahao Zhang ◽  
...  

Materials ◽  
2021 ◽  
Vol 14 (13) ◽  
pp. 3464
Author(s):  
Xuan Zou ◽  
Jingyuan Zhou ◽  
Xianwen Ran ◽  
Yiting Wu ◽  
Ping Liu ◽  
...  

Recent studies have shown that the energy release capacity of Polytetrafluoroethylene (PTFE)/Al with Si, and CuO, respectively, is higher than that of PTFE/Al. PTFE/Al/Si/CuO reactive materials with four proportions of PTFE/Si were designed by the molding–sintering process to study the influence of different PTFE/Si mass ratios on energy release. A drop hammer was selected for igniting the specimens, and the high-speed camera and spectrometer systems were used to record the energy release process and the flame spectrum, respectively. The ignition height of the reactive material was obtained by fitting the relationship between the flame duration and the drop height. It was found that the ignition height of PTFE/Al/Si/CuO containing 20% PTFE/Si is 48.27 cm, which is the lowest compared to the ignition height of other Si/PTFE ratios of PTFE/Al/Si/CuO; the flame temperature was calculated from the flame spectrum. It was found that flame temperature changes little for the same reactive material at different drop heights. Compared with the flame temperature of PTFE/Al/Si/CuO with four mass ratios, it was found that the flame temperature of PTFE/Al/Si/CuO with 20% PTFE/Si is the highest, which is 2589 K. The results show that PTFE/Al/Si/CuO containing 20% PTFE/Si is easier to be ignited and has a stronger temperature destruction effect.


Energies ◽  
2021 ◽  
Vol 14 (7) ◽  
pp. 1967
Author(s):  
Gaurav Kumar Roy ◽  
Marco Pau ◽  
Ferdinanda Ponci ◽  
Antonello Monti

Direct Current (DC) grids are considered an attractive option for integrating high shares of renewable energy sources in the electrical distribution grid. Hence, in the future, Alternating Current (AC) and DC systems could be interconnected to form hybrid AC-DC distribution grids. This paper presents a two-step state estimation formulation for the monitoring of hybrid AC-DC grids. In the first step, state estimation is executed independently for the AC and DC areas of the distribution system. The second step refines the estimation results by exchanging boundary quantities at the AC-DC converters. To this purpose, the modulation index and phase angle control of the AC-DC converters are integrated into the second step of the proposed state estimation formulation. This allows providing additional inputs to the state estimation algorithm, which eventually leads to improve the accuracy of the state estimation results. Simulations on a sample AC-DC distribution grid are performed to highlight the benefits resulting from the integration of these converter control parameters for the estimation of both the AC and DC grid quantities.


Sensors ◽  
2021 ◽  
Vol 21 (11) ◽  
pp. 3713
Author(s):  
Soyeon Lee ◽  
Bohyeok Jeong ◽  
Keunyeol Park ◽  
Minkyu Song ◽  
Soo Youn Kim

This paper presents a CMOS image sensor (CIS) with built-in lane detection computing circuits for automotive applications. We propose on-CIS processing with an edge detection mask used in the readout circuit of the conventional CIS structure for high-speed lane detection. Furthermore, the edge detection mask can detect the edges of slanting lanes to improve accuracy. A prototype of the proposed CIS was fabricated using a 110 nm CIS process. It has an image resolution of 160 (H) × 120 (V) and a frame rate of 113, and it occupies an area of 5900 μm × 5240 μm. A comparison of its lane detection accuracy with that of existing edge detection algorithms shows that it achieves an acceptable accuracy. Moreover, the total power consumption of the proposed CIS is 9.7 mW at pixel, analog, and digital supply voltages of 3.3, 3.3, and 1.5 V, respectively.


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