scholarly journals A Static Phase Offset Reduction Technique for Multiplying Delay-Locked Loop

2015 ◽  
Vol 06 (01) ◽  
pp. 13-19 ◽  
Author(s):  
Xinjie Wang ◽  
Tadeusz Kwasniewski
Keyword(s):  
Reduction Technique ◽  
Delay Locked Loop ◽  
Phase Offset ◽  
Static Phase ◽  
Static Phase Offset

1–5.6 Gb/s CMOS clock and data recovery IC with a static phase offset compensated linear phase detector

2013 ◽  
Vol 7 (3) ◽  
pp. 159-168 ◽  
Author(s):  
Sangjin Byun ◽  
Chung Hwan Son ◽  
Jongil Hwang ◽  
Byung‐Hun Min ◽  
Mun‐Yang Park ◽  
...  
Keyword(s):  
Clock And Data Recovery ◽  
Data Recovery ◽  
Phase Detector ◽  
Linear Phase ◽  
Phase Offset ◽  
Static Phase ◽  
Static Phase Offset
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