Development of Glass Interposer with Fine-Pitch Micro Bumps and Warpage Study Depending on Several Glass Substrates with Different CTE's

2014 ◽  
Vol 2014 (1) ◽  
pp. 000382-000387 ◽  
Author(s):  
Kenichi Mori ◽  
Naoyuki Koizumi ◽  
Kei Murayama ◽  
Mitsuhiro Aizawa ◽  
Koji Nagai ◽  
...  

This paper describes the development of a Glass-Interposer (Glass-IP) with 40um-pitch Cu micro- bumps. It features fine Cu wiring on the front side, Through-hole Glass-Vias (TGV), and a Re-distribution layer (RDL) on back side. After first explaining our process flow, we discuss the warpage of the fully assembled Glass-IP. The focus was on the CTE differences between the Glass-IP and the laminated substrate. The result was the lower CTE of the laminated substrate gave the assembly a lower warpage, while the CTE of Glass-IP had hardly any influence at all. Furthermore, we evaluated two assembly processes for the Glass-IP. One is called “Chip First Process” in which the chips are mounted on Glass-IP first. The other is called “Chip Last Process” where the Glass-IP is mounted on the laminated substrate first. It was confirmed by X-ray observation that the connectivity after full assembly is good for both processes.

2013 ◽  
Vol 2013 ◽  
pp. 1-5 ◽  
Author(s):  
C. Marutoiu ◽  
S. P. Grapini ◽  
A. Baciu ◽  
M. Miclaus ◽  
V. C. Marutoiu ◽  
...  

The Evangelic Church in Bistriţa city is one of the important gothic monuments in Romania. Inside the church there have been preserved a series of furniture pieces from different centuries, and the stall that has been analysed in this study is one of them. The study presents the investigations that were made on the occasion of restoring the stall. The nature and the status of the wooden supports and also the composition of the painting layer which covers the front side of the stall were investigated by several methods: Fourier transform infrared (FTIR) spectroscopy, X-ray diffraction (XRD), and differential scanning calorimetry (DSC) analyses. The back side of the stall was made of spruce fir wood and its status was also investigated. The nature of the component elements and the heritage value of the ensemble were also established.


2006 ◽  
Vol 969 ◽  
Author(s):  
Gereon Vogtmeier ◽  
Christian Drabe ◽  
Ralf Dorscheid ◽  
Roger Steadman ◽  
Dr. Alexander Wolter

AbstractThe foremost driver for the development of fully CMOS compatible Through Wafer Interconnects (TWIs) is the need of very large photodiode arrays for detectors, e.g. in computed tomography applications. The front to back-side contact allows the four-side buttable chip placement of the already large chips (20mm × 22mm2). The TWI technology allows an interconnection for chips up to 280μm thickness. This technique does not require any via opening at the font side, thus enabling a metal signal routing on the active side, on top of the interconnection. The application specific optical sensitive front-side of the chip is fully accessible. The production process is separated into three main steps. The first step is the implementation of the special TWI geometry into the CMOS substrate. Depending on the electrical and geometrical requirements of the circuit, different TWI structures are built with deep trenches (up to 280μm), which are passivated and filled with doped poly-silicon. The technologies used in this process, such as DRIE-etching, oxidation and low pressure CVD, are standard CMOS compatible processes. The use of poly-silicon prevents from achieving very low resistivity interconnections but allows the use of all CMOS process steps for an imager production (no temperature limitation – compared to other TWI process flows). The second step is the standard CMOS processing on the substrate already including the TWIs. The third step is a low temperature back-side process starting with wafer thinning down to 280μm or less to open the implemented TWI structure from the back-side. The thickness may be selected depending on the target application. A modified under ball metallization (UBM) process, which could include also re-routing of signals on the back-side, concludes the process flow until the solder ball placement, or similar bond connections.The special process flow opens a variety of applications which benefit from the full CMOS compatible processing and the accessible front-side.


2019 ◽  
Vol 14 (29) ◽  
pp. 73-81
Author(s):  
Ramiz A. Mohammed Al-Ansari

NiO0.99Cu0.01 films have been deposited using thermal evaporationtechnique on glass substrates under vacuum 10-5mbar. The thicknessof the films was 220nm. The as -deposited films were annealed todifferent annealing temperatures (373, 423, and 473) K undervacuum 10-3mbar for 1 h. The structural properties of the films wereexamined using X-ray diffraction (XRD). The results show that noclear diffraction peaks in the range 2θ= (20-50)o for the as depositedfilms. On the other hand, by annealing the films to 423K in vacuumfor 1 h, a weak reflection peak attributable to cubic NiO wasdetected. On heating the films at 473K for 1 h, this peak wasobserved to be stronger. The most intense peak is at 2θ = 37.12o withthe preferential orientation of the films being (111) plane. The opticalproperties of the films have been studied. The effect of annealingtemperature on the optical parameters of NiO0.99Cu0.01 such astransmittance, reflectance, absorption coefficient, refractive index,extinction coefficient, and real and imaginary parts of dielectricconstant has been reported.


1996 ◽  
Vol 466 (1) ◽  
pp. L51-L54 ◽  
Author(s):  
R. P. Kraft ◽  
D. N. Burrows ◽  
G. P. Garmire ◽  
J. A. Nousek

2014 ◽  
Vol 556-562 ◽  
pp. 185-188
Author(s):  
Shu Wang Duo ◽  
Huan Ke ◽  
Ting Zhi Liu ◽  
Hao Zhang

ZnS films have been deposited on glass by chemical bath deposition (CBD). The optical and structural properties were analyzed by UV-VIS spectrophotometer and X-ray diffraction (XRD). The results showed that different sides of glass substrate have different thicknesses of the ZnS thin films, which can affect the optical and structural properties of ZnS thin films. The ZnS films of the side of glass substrates back to the solution center are thicker than that of the other side, and the ZnS films from ZnSO4 are thicker than that from Zn (NO3)2. The transmittances lower with the thicknesses of ZnS films increasing. The band gaps exhibit blue response with the thicknesses of ZnS films increasing. From the sides of glass substrates back to the solution center, the (111) reflection of the sphalerite structure can be observed at about 2θ=29.1°, while from the other side toward the solution center showed no significant peak.


2006 ◽  
Vol 969 ◽  
Author(s):  
Gereon Vogtmeier ◽  
Christian Drabe ◽  
Ralf Dorscheid ◽  
Roger Steadman ◽  
Dr. Alexander Wolter

AbstractThe foremost driver for the development of fully CMOS compatible Through Wafer Interconnects (TWIs) is the need of very large photodiode arrays for detectors, e.g. in computed tomography applications. The front to back-side contact allows the four-side buttable chip placement of the already large chips (20mm × 22mm2). The TWI technology allows an interconnection for chips up to 280μm thickness. This technique does not require any via opening at the font side, thus enabling a metal signal routing on the active side, on top of the interconnection. The application specific optical sensitive front-side of the chip is fully accessible. The production process is separated into three main steps. The first step is the implementation of the special TWI geometry into the CMOS substrate. Depending on the electrical and geometrical requirements of the circuit, different TWI structures are built with deep trenches (up to 280μm), which are passivated and filled with doped poly-silicon. The technologies used in this process, such as DRIE-etching, oxidation and low pressure CVD, are standard CMOS compatible processes. The use of poly-silicon prevents from achieving very low resistivity interconnections but allows the use of all CMOS process steps for an imager production (no temperature limitation – compared to other TWI process flows). The second step is the standard CMOS processing on the substrate already including the TWIs. The third step is a low temperature back-side process starting with wafer thinning down to 280μm or less to open the implemented TWI structure from the back-side. The thickness may be selected depending on the target application. A modified under ball metallization (UBM) process, which could include also re-routing of signals on the back-side, concludes the process flow until the solder ball placement, or similar bond connections.The special process flow opens a variety of applications which benefit from the full CMOS compatible processing and the accessible front-side.


2017 ◽  
Vol 24 (07) ◽  
pp. 1750096 ◽  
Author(s):  
ANAS A. AHMED ◽  
MUTHARASU DEVARAJAN ◽  
NAVEED AFZAL

This work explores the structural, surface and optical properties of NiO films grown on Si, GaAs, PET and glass substrates. The NiO films were deposited on these substrates under same conditions by using radiofrequency (RF) magnetron sputtering of NiO target at 100[Formula: see text]C. The structural study by X-ray diffraction (XRD) showed the existence of (200) and (220) oriented NiO peaks on all the substrates. The preferred orientation of NiO films on Si, GaAs and glass was along (200) plane whereas the film grown on PET was observed to be oriented along (220) plane. The crystallite size of NiO on GaAs was the largest among the other substrates. The RMS surface roughness on PET was higher as compared to the other substrates. The band gap of NiO films grown on glass and PET was estimated from UV–Vis transmittance spectroscopy whereas the UV–Vis reflection spectroscopy was carried out to find out the band gap of NiO grown on GaAs and Si substrates. The band gap of NiO on PET was higher than its band gap obtained on other substrates. The results obtained on properties of NiO films on different substrates were correlated with each other.


Author(s):  
P. Ingram

It is well established that unique physiological information can be obtained by rapidly freezing cells in various functional states and analyzing the cell element content and distribution by electron probe x-ray microanalysis. (The other techniques of microanalysis that are amenable to imaging, such as electron energy loss spectroscopy, secondary ion mass spectroscopy, particle induced x-ray emission etc., are not addressed in this tutorial.) However, the usual processes of data acquisition are labor intensive and lengthy, requiring that x-ray counts be collected from individually selected regions of each cell in question and that data analysis be performed subsequent to data collection. A judicious combination of quantitative elemental maps and static raster probes adds not only an additional overall perception of what is occurring during a particular biological manipulation or event, but substantially increases data productivity. Recent advances in microcomputer instrumentation and software have made readily feasible the acquisition and processing of digital quantitative x-ray maps of one to several cells.


2009 ◽  
Vol 1 (2) ◽  
pp. 18-20
Author(s):  
Dahyunir Dahlan

Copper oxide particles were electrodeposited onto indium tin oxide (ITO) coated glass substrates. Electrodeposition was carried out in the electrolyte containing cupric sulphate, boric acid and glucopone. Both continuous and pulse currents methods were used in the process with platinum electrode, saturated calomel electrode (SCE) and ITO electrode as the counter, reference and working electrode respectively. The deposited particles were characterized by X-ray diffraction (XRD) and scanning electron microscopy (SEM). It was found that, using continuous current deposition, the deposited particles were mixture of Cu2O and CuO particles. By adding glucopone in the electrolyte, particles with spherical shapes were produced. Electrodeposition by using pulse current, uniform cubical shaped Cu2O particles were produced


2019 ◽  
Vol 15 (34) ◽  
pp. 1-14
Author(s):  
Bushra A. Hasan

Lead selenide PbSe thin films of different thicknesses (300, 500, and 700 nm) were deposited under vacuum using thermal evaporation method on glass substrates. X-ray diffraction measurements showed that increasing of thickness lead to well crystallize the prepared samples, such that the crystallite size increases while the dislocation density decreases with thickness increasing. A.C conductivity, dielectric constants, and loss tangent are studied as function to thickness, frequency (10kHz-10MHz) and temperatures (293K-493K). The conductivity measurements confirm confirmed that hopping is the mechanism responsible for the conduction process. Increasing of thickness decreases the thermal activation energy estimated from Arhinus equation is found to decrease with thickness increasing. The increase of thickness lead to reduce the polarizability α while the increasing of temperature lead to increase α.


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