scholarly journals Shear Strength Degradation Modeling of Lead-Free Solder Joints at Different Isothermal Aging Conditions

2021 ◽  
Vol 18 (3) ◽  
pp. 137-144
Author(s):  
Dania Bani Hani ◽  
Raed Al Athamneh ◽  
Mohammed Aljarrah ◽  
Sa’d Hamasha
Keyword(s):  
Mechanical Properties ◽  
Shear Strength ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Constant Strain Rate ◽  
Circuit Board ◽  
Sac305 Solder ◽  
Aging Conditions ◽  
Osp Surface Finish ◽  
Shear Strength Degradation

Abstract SAC-based alloys are one of the most common solder materials that are utilized to provide mechanical support and electrical connection between electronic components and the printed circuit board. Enhancing the mechanical properties of solder joints can improve the life of the components. One of the mechanical properties that define the solder joint structure integrity is the shear strength. The main objective of this study is to assess the shear strength behavior of SAC305 solder joints under different aging conditions. Instron 5948 Micromechanical Tester with a customized fixture is used to perform accelerated shear tests on individual solder joints. The shear strength of SAC305 solder joints with organic solderability preservative (OSP) surface finish is investigated at constant strain rate under different aging times (2, 10, 100, and 1,000 h) and different aging temperatures (50, 100, and 150°C). The nonaged solder joints are examined as well for comparison purposes. Analysis of variance (ANOVA) is accomplished to identify the contribution of each parameter on the shear strength. A general empirical model is developed to estimate the shear strength as a function of aging conditions using the Arrhenius term. Microstructure analysis is performed at different aging conditions using scanning electron microscope (SEM). The results revealed a significant reduction in the shear strength when the aging level is increased. An increase in the precipitates coarsening and intermetallic compound (IMC) layer thickness are observed with increased aging time and temperature.

scholarly journals Performance of Sn-3.0Ag-0.5Cu Composite Solder with Kaolin Geopolymer Ceramic Reinforcement on Microstructure and Mechanical Properties under Isothermal Ageing

Materials ◽  
2021 ◽  
Vol 14 (4) ◽  
pp. 776
Author(s):  
Nur Syahirah Mohamad Zaimi ◽  
Mohd Arif Anuar Mohd Salleh ◽  
Andrei Victor Sandu ◽  
Mohd Mustafa Al Bakri Abdullah ◽  
Norainiza Saud ◽  
...  
Keyword(s):  
Shear Strength ◽  
Composite Solder ◽  
Printed Circuit Board ◽  
Microwave Sintering ◽  
Copper Substrate ◽  
Bulk Diffusion ◽  
Circuit Board ◽  
Sac305 Solder ◽  
Lap Shear ◽  
Isothermal Ageing

This paper elucidates the effect of isothermal ageing at temperature of 85 °C, 125 °C and 150 °C for 100, 500 and 1000 h on Sn-3.0Ag-0.5Cu (SAC305) lead-free solder with the addition of 1 wt% kaolin geopolymer ceramic (KGC) reinforcement particles. SAC305-KGC composite solders were fabricated through powder metallurgy using a hybrid microwave sintering method and reflowed on copper substrate printed circuit board with an organic solderability preservative surface finish. The results revealed that, the addition of KGC was beneficial in improving the total thickness of interfacial intermetallic compound (IMC) layer. At higher isothermal ageing of 150 °C and 1000 h, the IMC layer in SAC305-KGC composite solder was towards a planar-type morphology. Moreover, the growth of total interfacial IMC layer and Cu3Sn layer during isothermal ageing was found to be controlled by bulk diffusion and grain-boundary process, respectively. The activation energy possessed by SAC305-KGC composite solder for total interfacial IMC layer and Cu3Sn IMC was 74 kJ/mol and 104 kJ/mol, respectively. Based on a lap shear test, the shear strength of SAC305-KGC composite solder exhibited higher shear strength than non-reinforced SAC305 solder. Meanwhile, the solder joints failure mode after shear testing was a combination of brittle and ductile modes at higher ageing temperature and time for SAC305-KGC composite solder.

Validation of the Critical Strain-Based Methodology for Evaluating the Mechanical Safety of Ball Grid Array Solder Joints in a Launch Random Vibration Environment

2021 ◽  
Author(s):  
Tae-Yong Park ◽  
Hyun-Ung Oh
Keyword(s):  
Fatigue Life ◽  
Random Vibration ◽  
Critical Strain ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Mechanical Design ◽  
Ball Grid Array ◽  
Primary Objective ◽  
Circuit Board ◽  
Analytical Approaches

Abstract To overcome the theoretical limitations of Steinberg's theory for evaluating the mechanical safety of the solder joints of spaceborne electronics in a launch random vibration environment, a critical strain-based methodology was proposed and validated in a previous study. However, for the critical strain-based methodology to be used reliably in the mechanical design of spaceborne electronics, its effectiveness must be validated under various conditions of the package mounting locations and the first eigenfrequencies of a printed circuit board (PCB); achieving this validation is the primary objective of this study. For the experimental validation, PCB specimens with ball grid array packages mounted on various board locations were fabricated and exposed to a random vibration environment to assess the fatigue life of the solder joint. The effectiveness of the critical strain-based methodology was validated through a comparison of the fatigue life of the tested packages and their margin of safety, which was estimated using various analytical approaches.

Effect of intermetallic compound layer thickness on the shear strength of 1206 chip resistor solder joint

2015 ◽  
Vol 27 (1) ◽  
pp. 52-58 ◽  
Author(s):  
Peter K. Bernasko ◽  
Sabuj Mallik ◽  
G. Takyi
Keyword(s):  
Shear Strength ◽  
Intermetallic Compound ◽  
Solder Joint ◽  
Layer Thickness ◽  
Solder Joints ◽  
Ageing Time ◽  
Circuit Board ◽  
Intermetallic Compound Layer ◽  
Content Type ◽  
Surface Mount

Purpose – The purpose of this paper is to study the effect of intermetallic compound (IMC) layer thickness on the shear strength of surface-mount component 1206 chip resistor solder joints. Design/methodology/approach – To evaluate the shear strength and IMC thickness of the 1206 chip resistor solder joints, the test vehicles were conventionally reflowed for 480 seconds at a peak temperature of 240°C at different isothermal ageing times of 100, 200 and 300 hours. A cross-sectional study was conducted on the reflowed and aged 1206 chip resistor solder joints. The shear strength of the solder joints aged at 100, 200 and 300 hours was measured using a shear tester (Dage-4000PXY bond tester). Findings – It was found that the growth of IMC layer thickness increases as the ageing time increases at a constant temperature of 175°C, which resulted in a reduction of solder joint strength due to its brittle nature. It was also found that the shear strength of the reflowed 1206 chip resistor solder joint was higher than the aged joints. Moreover, it was revealed that the shear strength of the 1206 resistor solder joints aged at 100, 200 and 300 hours was influenced by the ageing reaction times. The results also indicate that an increase in ageing time and temperature does not have much influence on the formation and growth of Kirkendall voids. Research limitations/implications – A proper correlation between shear strength and fracture mode is required. Practical implications – The IMC thickness can be used to predict the shear strength of the component/printed circuit board pad solder joint. Originality/value – The shear strength of the 1206 chip resistor solder joint is a function of ageing time and temperature (°C). Therefore, it is vital to consider the shear strength of the surface-mount chip component in high-temperature electronics.

Kinetics of Cavity Growth In Solder Joints During Thermal Cycle

1984 ◽  
Vol 40 ◽  
Author(s):  
Donald S. Stone ◽  
Thomas R. Homa ◽  
Che-Yu Li
Keyword(s):  
Printed Circuit Board ◽  
Solder Joints ◽  
Cavity Growth ◽  
Circuit Board ◽  
Printed Circuit Board Assembly ◽  
State Variable ◽  
Circuit Board Assembly ◽  
Variable Equation ◽  
Chip Carrier ◽  
Kinetics Of

AbstractGrain boundary cavity growth in solder joints during thermal fatigue is analyzed. The stress cycle profile is estimated based on a geometrically simplified model of a ceramic chip carrier - printed circuit board assembly and a state variable equation for plastic flow in the solder.

Reliability of Fan-Out Wafer-Level Heterogeneous Integration

2018 ◽  
Vol 15 (4) ◽  
pp. 148-162 ◽  
Author(s):  
John Lau ◽  
Ming Li ◽  
Yang Lei ◽  
Margie Li ◽  
Iris Xu ◽  
...  
Keyword(s):  
Thermal Cycling ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Thermal Cycling Test ◽  
Wafer Level ◽  
Molding Compound ◽  
Shock Test ◽  
Cycling Test

Abstract In this study, the reliability (thermal cycling and shock) performances of a fan-out wafer-level system-in-package (SiP) or heterogeneous integration with one large chip (5 × 5 mm), three small chips (3 ×3 mm), and four capacitors (0402) embedded in an epoxy molding compound package (10 × 10 mm) with two redistribution layers (RDLs) are experimentally determined. Emphasis is placed on the estimation of the Weibull life distribution, characteristic life, and failure rate of the solder joint and RDL of this package. The fan-out wafer-level packaging is assembled on a printed circuit board (PCB) with more than 400 (Sn3wt%Ag0.5wt%Cu) solder joints. It is a six-layer PCB. The sample sizes for the thermal cycling test and shock test are, respectively, equal to 60 and 24. The failure location and modes of the thermal cycling test and shock test of the fan-out wafer-level SiP solder joints and RDLs are provided and discussed. 3-D nonlinear finite element models are also constructed and analyzed for the fan-out heterogeneous integration package during thermal cycling and shock conditions. The simulation results are correlated to the experimental results. Finally, recommendations on improving the fan-out wafer-level SiP solder joints and RDLs under thermal and shock conditions are provided.

Damage Path Simulation of Solder Joints in QFP

2005 ◽  
Author(s):  
Minoru Mukai ◽  
Kenji Hirohata ◽  
Hiroyuki Takahashi ◽  
Takashi Kawakami ◽  
Kuniaki Takahashi
Keyword(s):  
Crack Propagation ◽  
Present Method ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Fatigue Cracks ◽  
New Method ◽  
Circuit Board ◽  
Crack Model ◽  
Element Analysis ◽  
Electronic Package

Fatigue life prediction of solder joints is one of the most important areas of research in the development of reliable electronic packages. Recent trends in electronic package development indicate a shift toward smaller solder joints and larger package sizes, and temperature changes under field conditions are also becoming greater. Since reliability design of solder joints has become severer, the estimation of the crack propagation is becoming important like the estimation of the crack initiation. In the present study, a new method of estimating the crack propagation, which is based on finite element analysis without geometrical crack model, was examined, in order to ensure suitability for practical use in electronic package design. On the basis of a damage model assumed for Sn-37Pb solder, the new method called ‘damage path simulation’ was verified for solder joints in QFP (Quad Flat Package). In the case of solder joints of the gull-wing type, fatigue cracks are commonly initiated from the upper surface of the solder fillet, and propagated in the vicinity of the interface with the outer lead. It was clear that the extension of the damage path showed good agreement with the behavior of crack propagation observed in the actual thermal cycle tests. Damage path extension from a pointed end of outer lead is also simulated simultaneously with that from the upper surface of the solder fillet, and both damage paths were finally combined at a gap between outer lead and printed circuit board. The advantage of the present method is especially evident when the fatigue cracks were initiated from two or more regions. From the results of this study, it was concluded that the estimation of the crack propagation in solder joints based on the present method is satisfactory for engineering purposes.

High-Speed Cyclic Bend Tests and Board-Level Drop Tests for Evaluating the Robustness of Solder Joints in Printed Circuit Board Assemblies

2009 ◽  
Vol 38 (6) ◽  
pp. 884-895 ◽  
Author(s):  
E.H. Wong ◽  
S.K.W. Seah ◽  
C.S. Selvanayagam ◽  
R. Rajoo ◽  
W.D. van Driel ◽  
...  
Keyword(s):  
High Speed ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Circuit Board ◽  
Printed Circuit ◽  
Drop Tests ◽  
Bend Tests ◽  
Board Level
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