Validation of the Critical Strain-Based Methodology for Evaluating the Mechanical Safety of Ball Grid Array Solder Joints in a Launch Random Vibration Environment

2021 ◽  
Author(s):  
Tae-Yong Park ◽  
Hyun-Ung Oh
Keyword(s):  
Fatigue Life ◽  
Random Vibration ◽  
Critical Strain ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Mechanical Design ◽  
Ball Grid Array ◽  
Primary Objective ◽  
Circuit Board ◽  
Analytical Approaches

Abstract To overcome the theoretical limitations of Steinberg's theory for evaluating the mechanical safety of the solder joints of spaceborne electronics in a launch random vibration environment, a critical strain-based methodology was proposed and validated in a previous study. However, for the critical strain-based methodology to be used reliably in the mechanical design of spaceborne electronics, its effectiveness must be validated under various conditions of the package mounting locations and the first eigenfrequencies of a printed circuit board (PCB); achieving this validation is the primary objective of this study. For the experimental validation, PCB specimens with ball grid array packages mounted on various board locations were fabricated and exposed to a random vibration environment to assess the fatigue life of the solder joint. The effectiveness of the critical strain-based methodology was validated through a comparison of the fatigue life of the tested packages and their margin of safety, which was estimated using various analytical approaches.

Solder Joints Reliability Assessment for Stacked CSP Module Based on Flexible Circuit Printed Board

2011 ◽  
Vol 189-193 ◽  
pp. 2125-2128
Author(s):  
Hai Dong Yan ◽  
De Jian Zhou ◽  
Qiang Zhao
Keyword(s):  
Fatigue Life ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Reliability Assessment ◽  
Constraint Equation ◽  
Damage Parameter ◽  
Global Model ◽  
Circuit Board ◽  
Geometrical Parameters ◽  
Solder Reliability

Solder reliability assessments for stacked CSP module based on flexible printed circuit board (FPC) are performed in this research using a 3D global model with constraint equation and two levels submodeling technique. 3D global model with constraint equation(CE) was used to provide real boundary contiditons for 1st level submodeling,and quarter local model used as 2ndlevel submodeling was used to address cirtical solder joint failure locations ,to estimate solder reliability for the module and to provide reasonable boundary contiditons for 2ndlevel submodeling.slice model used as 2ndlevel submodeling was used to study that the effect on the cirtical solder damage parameter under various basefilm material of FPC and geometrical parameters. It is found that thinner CSP die thickness and thinner PCB ,thicker FPC basefilm and FPC adhesive thickness and CSP thickness,and higher solder standoff height, lead to smaller averaged accumulated viscoplastic strain energy density(ΔWavg) and higher fatigue life; It is also figures out,PI and PEN basefilm material lead to smaller ΔWavg and higher fatigue life for the most critical solder than LCP material.Weibull distributions and weibull probaility density function for the module under various FPC baseflim material were obtained,and 63.2% solder joints failure life was used as solder joints reliability assessment for stacked CSP module.

scholarly journals New Version of High-Damping PCB with Multi-Layered Viscous Lamina

Aerospace ◽  
2021 ◽  
Vol 8 (8) ◽  
pp. 202
Author(s):  
Tae-Yong Park ◽  
Seok-Jin Shin ◽  
Hyun-Ung Oh
Keyword(s):  
Fatigue Life ◽  
Random Vibration ◽  
Printed Circuit Board ◽  
Fatigue Tests ◽  
Circuit Board ◽  
Electronic Packages ◽  
Vibration Attenuation ◽  
Vibration Fatigue ◽  
Viscoelastic Layers ◽  
Electronic Parts

In a previous study, a high-damping printed circuit board (PCB) implemented by multilayered viscoelastic acrylic tapes was investigated to increase the fatigue life of solder joints of electronic packages by vibration attenuation in a random vibration environment. However, the main drawback of this concept is its inability to mount electronic parts on the PCB surface area occupied by interlaminated layers. For the efficient spatial accommodation of electronics, this paper proposes a new version of a high-damping PCB with multilayered viscoelastic tapes interlaminated on a thin metal stiffener spaced from a PCB. Compared to the previous study, this concept ensures efficient utilization of the PCB area for mounting electronic parts as well as the vibration attenuation capability. Free vibration tests were performed at various temperatures to obtain the basic characteristics of the proposed PCB. The effectiveness of the proposed PCB was verified by random vibration fatigue tests of sample PCBs with various numbers of viscoelastic layers to compare the fatigue life of electronic packages.

A New Thermal-Fatigue Life Prediction Model for Wafer Level Chip Scale Package (WLCSP) Solder Joints

2002 ◽  
Vol 124 (3) ◽  
pp. 212-220 ◽  
Author(s):  
John H. Lau ◽  
Stephen H. Pan ◽  
Chris Chang
Keyword(s):  
Fatigue Life ◽  
Thermal Fatigue ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Time Dependent ◽  
Circuit Board ◽  
Wafer Level ◽  
Temperature Dependent ◽  
Thermal Fatigue Life ◽  
Chip Scale Package

A new empirical equation for predicting the thermal-fatigue life of wafer level chip scale package (WLCSP) solder joints on printed circuit board (PCB) is presented. The solder joints are subjected to thermal cycling and their crack lengths at different thermal cycles are measured. Also, the average strain energy density around the crack tip of different crack lengths in the corner solder joint is determined by a time-dependent nonlinear fracture mechanics with finite element method. The solder is assumed to be a temperature-dependent elastic-plastic and a time-dependent creep material.

A New Thermal-Fatigue Life Prediction Model for Wafer Level Chip Scale Package (WLCSP) Solder Joints

2000 ◽  
Author(s):  
John H. Lau ◽  
Stephen H. Pan ◽  
Chris Chang
Keyword(s):  
Fatigue Life ◽  
Thermal Fatigue ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Time Dependent ◽  
Circuit Board ◽  
Wafer Level ◽  
Temperature Dependent ◽  
Thermal Fatigue Life ◽  
Chip Scale Package

Abstract A new empirical equation for predicting the thermal-fatigue life of wafer level chip scale package (WLCSP) solder joints on printed circuit board (PCB) is presented. The solder joints are subjected to thermal cycling and their crack lengths at different thermal cycles are measured. Also, the average strain energy density around the crack tip of different crack lengths in the corner solder joint is determined by a time-dependent nonlinear fracture mechanics with finite element method. The solder is assumed to be a temperature-dependent elastic-plastic and a time-dependent creep material.

Kinetics of Cavity Growth In Solder Joints During Thermal Cycle

1984 ◽  
Vol 40 ◽  
Author(s):  
Donald S. Stone ◽  
Thomas R. Homa ◽  
Che-Yu Li
Keyword(s):  
Printed Circuit Board ◽  
Solder Joints ◽  
Cavity Growth ◽  
Circuit Board ◽  
Printed Circuit Board Assembly ◽  
State Variable ◽  
Circuit Board Assembly ◽  
Variable Equation ◽  
Chip Carrier ◽  
Kinetics Of

AbstractGrain boundary cavity growth in solder joints during thermal fatigue is analyzed. The stress cycle profile is estimated based on a geometrically simplified model of a ceramic chip carrier - printed circuit board assembly and a state variable equation for plastic flow in the solder.

scholarly journals Shear Strength Degradation Modeling of Lead-Free Solder Joints at Different Isothermal Aging Conditions

2021 ◽  
Vol 18 (3) ◽  
pp. 137-144
Author(s):  
Dania Bani Hani ◽  
Raed Al Athamneh ◽  
Mohammed Aljarrah ◽  
Sa’d Hamasha
Keyword(s):  
Mechanical Properties ◽  
Shear Strength ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Constant Strain Rate ◽  
Circuit Board ◽  
Sac305 Solder ◽  
Aging Conditions ◽  
Osp Surface Finish ◽  
Shear Strength Degradation

Abstract SAC-based alloys are one of the most common solder materials that are utilized to provide mechanical support and electrical connection between electronic components and the printed circuit board. Enhancing the mechanical properties of solder joints can improve the life of the components. One of the mechanical properties that define the solder joint structure integrity is the shear strength. The main objective of this study is to assess the shear strength behavior of SAC305 solder joints under different aging conditions. Instron 5948 Micromechanical Tester with a customized fixture is used to perform accelerated shear tests on individual solder joints. The shear strength of SAC305 solder joints with organic solderability preservative (OSP) surface finish is investigated at constant strain rate under different aging times (2, 10, 100, and 1,000 h) and different aging temperatures (50, 100, and 150°C). The nonaged solder joints are examined as well for comparison purposes. Analysis of variance (ANOVA) is accomplished to identify the contribution of each parameter on the shear strength. A general empirical model is developed to estimate the shear strength as a function of aging conditions using the Arrhenius term. Microstructure analysis is performed at different aging conditions using scanning electron microscope (SEM). The results revealed a significant reduction in the shear strength when the aging level is increased. An increase in the precipitates coarsening and intermetallic compound (IMC) layer thickness are observed with increased aging time and temperature.

Reliability of Fan-Out Wafer-Level Heterogeneous Integration

2018 ◽  
Vol 15 (4) ◽  
pp. 148-162 ◽  
Author(s):  
John Lau ◽  
Ming Li ◽  
Yang Lei ◽  
Margie Li ◽  
Iris Xu ◽  
...  
Keyword(s):  
Thermal Cycling ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Thermal Cycling Test ◽  
Wafer Level ◽  
Molding Compound ◽  
Shock Test ◽  
Cycling Test

Abstract In this study, the reliability (thermal cycling and shock) performances of a fan-out wafer-level system-in-package (SiP) or heterogeneous integration with one large chip (5 × 5 mm), three small chips (3 ×3 mm), and four capacitors (0402) embedded in an epoxy molding compound package (10 × 10 mm) with two redistribution layers (RDLs) are experimentally determined. Emphasis is placed on the estimation of the Weibull life distribution, characteristic life, and failure rate of the solder joint and RDL of this package. The fan-out wafer-level packaging is assembled on a printed circuit board (PCB) with more than 400 (Sn3wt%Ag0.5wt%Cu) solder joints. It is a six-layer PCB. The sample sizes for the thermal cycling test and shock test are, respectively, equal to 60 and 24. The failure location and modes of the thermal cycling test and shock test of the fan-out wafer-level SiP solder joints and RDLs are provided and discussed. 3-D nonlinear finite element models are also constructed and analyzed for the fan-out heterogeneous integration package during thermal cycling and shock conditions. The simulation results are correlated to the experimental results. Finally, recommendations on improving the fan-out wafer-level SiP solder joints and RDLs under thermal and shock conditions are provided.

Sign in / Sign up

Export Citation Format

Share Document