Terahertz Diode Arrays and Differential Probes based on Heterogeneous Integration and Silicon Micromachining

2016 ◽  
Vol 2016 (DPC) ◽  
pp. 000924-000962 ◽  
Author(s):  
Robert M. Weikle ◽  
C. Zhang ◽  
S. Hawasli ◽  
S. Nadri ◽  
L. Xie ◽  
...  

Due to the technological needs of the radio astronomy and remote sensing scientific communities, as well as emerging applications in the areas of imaging, security, and broadband communications, terahertz and submillimeter-wave electronics continues to be an area of growth and increasing interest for academic researchers, government laboratories, and industry. The recent establishment of a commercial infrastructure for test and measurement instrumentation in this spectral region has fueled this growth and the emergence of CMOS as a submillimeter-wave technology has greatly expanded access to this spectral region by providing circuit designers with a platform for realizing terahertz circuits without need for specialized fabrication facilities or processes. The continued emergence of new terahertz devices has created a need for improved approaches to packaging, integration, and measurement tools for diagnostics and characterization in this portion of the spectrum. This paper focuses on progress in two parallel efforts aimed at addressing these needs: (1) the development of a direct-contact probe technology for on-wafer measurement of differential scattering-parameters in the WR-5.1 (140—220 GHz) and WR-3.4 (220—330 GHz) frequency bands, and (2) the development of processing technologies for realizing highly-integrated submillimeter-wave diode-based quasi-optical arrays, including phase modulators and sideband generators, that are based on heterogeneous integration of III-V semiconductors onto thin silicon membranes as a support substrate. The foundation for these efforts is micromachining and processing of silicon, allowing the fabrication of mechanically-robust and low-loss membrane carriers that can support and interconnect terahertz devices as well as directly interface them to surrounding circuitry. Examples of heterogeneous integration onto silicon as an approach to packaging and interfacing terahertz components that are detailed in this paper include development of differential micromachined wafer probes for in situ measurements of devices and circuits in the 140—330 GHz region. The probe design concept includes an integrated on-chip balun and matching network for terminating common-mode signals that may be generated by the DUT. The design methodology and initial measurement results for this probe will be presented. In addition, an example of heterogeneous integration/packaging of a submillimeter-wave frequency sideband generator array for phase modulation at 1.6 THz will be discussed. The sideband generator design incorporates 100 planar varactor diodes integrated into an array of bowtie antennas on a common substrate. Performance of the array as a phase shifter is described and the application of a new quasi-vertical diode fabrication process that consists of transfer of GaAs epitaxy to thin silicon support substrates will be discussed as an approach for implementing optimized arrays in the terahertz frequency range.

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 002041-002081
Author(s):  
Robert M. Weikle ◽  
N. Scott Barker ◽  
Arthur W. Lichtenberger ◽  
Matthew F. Bauwens ◽  
Naser Alijabbari

Terahertz electronics has been a topic of research and development for many years, motivated largely by the technological needs of the radio astronomy and remote sensing scientific communities. Over the past decade, however, this field has experienced dramatic growth and intense, renewed interest from academic researchers and federal agencies, as well as from industry. This interest has arisen, in part, from recent funding initiatives from the federal government (such as DARPA's Terahertz Electronics Program), but is also largely due to the establishment of a commercial infrastructure that has made test and measurement instrumentation available to the engineers and scientists working at these frequencies. Moreover, the emergence of CMOS as a potential submillimeter-wave device technology has greatly expanded access to this spectral region by providing circuit designers with a platform for realizing terahertz circuits without need for specialized fabrication facilities or processes. The recent and rapid progress in terahertz electronics has created a demand for improved approaches to packaging and integration, as well as a need for new measurement instrumentation for characterizing emerging terahertz devices. This paper focuses on two recent research developments aimed at addressing these needs and broadening the technology base for both terahertz system implementation and terahertz metrology. These developments include (1) the development of a direct-contact probe technology that permits on-wafer scattering-parameter characterization and measurement of planar integrated devices at frequencies to 1 THz and beyond, and (2) the establishment of processing technologies that permit fabrication of highly-integrated submillimeter-wave diode-based circuits, such as heterodyne receivers and frequency multipliers, that are based on heterogeneous integration of III-V semiconductor devices with thin silicon membranes as a support and integration substrate. The technical foundation for each of these efforts is micromachining of silicon that allow the formation of mechanically-robust and low-loss membrane carriers to support terahertz devices and circuitry. Two examples of heterogeneous integration with silicon as an approach to packaging terahertz components are detailed in this paper. These include development of micromachined probes for on-wafer measurements of devices and circuits in the WR-1.0 waveguide band (0.75 – 1.1 THz). The probe design concept will be presented and methods for characterizing the probe described. Measurements demonstrate that the probes exhibit an insertion loss of less than 7 dB and return loss of greater than 15 dB over 750—1100 GHz band, yielding the first demonstration of on-wafer probe operating above 1 THz. In addition, an example of heterogeneous integration/packaging of a submillimeter-wave frequency quadrupler operating at 160 GHz with efficiency of 30% and corresponding output power of 70 mW will be discussed. The quadrupler design includes two frequency doubler stages in cascade and is based on a balanced circuit architecture that addresses degradation issues often arising from impedance mismatches between multiplier stages. A unique quasi-vertical diode fabrication process consisting of transfer of GaAs epitaxy to the thin silicon support substrate is used to implement the quadrupler, resulting in an integrated drop-in chip module that incorporates 18 varactors, matching networks and beamleads for mounting.


2016 ◽  
Vol 184 (1-2) ◽  
pp. 412-417 ◽  
Author(s):  
A. Endo ◽  
S. J. C. Yates ◽  
J. Bueno ◽  
D. J. Thoen ◽  
V. Murugesan ◽  
...  

2017 ◽  
Vol 2017 (S1) ◽  
pp. 1-40
Author(s):  
Subramanian S. Iyer (Subu)

Silicon features have scaled by over 1500X for over six decades, and with the adoption of innovative materials delivered better power-performance, density and till recently, cost per function, almost every generation. This has spawned a vibrant system-on-chip (SoC) approach, where progressively more function has been integrated on a single die. The integration of multiple dies on packages and boards has, however, scaled only modestly by a factor of three to five times. However, as SoCs have become bigger and more complex, the Non-Recurring Engineering (NRE) Charge and time to market have both ballooned out of control leading to ever increasing market consolidation. We need to address this problem through novel methods of system Integration. With the well-documented slowing down of scaling and the advent of the Internet of Things, there is a focus on heterogeneous integration and system-level scaling. Packaging itself is undergoing a transformation that focuses on overall system performance through integration rather than on packaging individual components. We propose ways in which this transformation can evolve to provide a significant value at the system level while providing a significantly lower barrier to entry compared with a chip-based SoC approach that is currently used. More importantly it will allow us to re-architect systems in a very significant way. This transformation is already under way with 3-D stacking of dies, Wafer level fan-out processing, and will evolve to make heterogeneous integration the backbone of a new SoC methodology, extending to integrate entire Systems on Wafers (SoWs). We will describe the technology we use and the results to-date. This has implications in redefining the memory hierarchy in conventional systems and in neuromorphic systems. We extend these concepts to flexible and biocompatible electronics.


2020 ◽  
Vol 9 (1) ◽  
Author(s):  
Zhifeng Zhang ◽  
Haoqi Zhao ◽  
Danilo Gomes Pires ◽  
Xingdu Qiao ◽  
Zihe Gao ◽  
...  

Abstract On-chip integrated laser sources of structured light carrying fractional orbital angular momentum (FOAM) are highly desirable for the forefront development of optical communication and quantum information–processing technologies. While integrated vortex beam generators have been previously demonstrated in different optical settings, ultrafast control and sweep of FOAM light with low-power control, suitable for high-speed optical communication and computing, remains challenging. Here we demonstrate fast control of the FOAM from a vortex semiconductor microlaser based on fast transient mixing of integer laser vorticities induced by a control pulse. A continuous FOAM sweep between charge 0 and charge +2 is demonstrated in a 100 ps time window, with the ultimate speed limit being established by the carrier recombination time in the gain medium. Our results provide a new route to generating vortex microlasers carrying FOAM that are switchable at GHz frequencies by an ultrafast control pulse.


2007 ◽  
Author(s):  
S. Saito ◽  
D. Hisamoto ◽  
H. Shimizu ◽  
H. Hamamura ◽  
R. Tsuchiya ◽  
...  

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