3D-IC Integration Using D2C or D2W Alignment Schemes Together with Local Oxide Reduction
2011 ◽
Vol 2011
(DPC)
◽
pp. 001291-001315
Keyword(s):
3D Ic
◽
3-Dimensional interconnection of high density integrated circuits enables building devices with greater functionality with higher performances in a smaller space. This paper explores the chip-to-chip and chip-to-wafer alignment and the associated bonding techniques such as in-situ reflow or thermocompression with a local oxide reduction which contributes to higher yield together with reduction of the force or temperature requirements.
1986 ◽
Vol 44
◽
pp. 882-883
Keyword(s):
Keyword(s):
Keyword(s):
1996 ◽
Vol 44
(7)
◽
pp. 1074-1080
◽
2011 ◽
Vol 17
(40)
◽
pp. 11290-11295
◽
2021 ◽
Vol 313
◽
pp. 125376
2008 ◽
Vol 17
(12)
◽
pp. 2071-2074
◽
Keyword(s):