scholarly journals A Novel 9-Level Switched Capacitor Inverter Using Different Carrier Based PWM Techniques

2020 ◽  
Vol 5 (6) ◽  
pp. 1200-1205
Author(s):  
Liju Shaji ◽  
Praveen Bansal
Keyword(s):  
Phase Shift ◽  
Single Stage ◽  
Multilevel Inverter ◽  
Variable Frequency ◽  
Switched Capacitor ◽  
Switched Capacitors ◽  
Voltage Stress ◽  
Two Stages

In this paper, a new 9-level inverter employing switched capacitor technique is proposed. Three bidirectional voltage blocking switches are employed to connect the four H-bridges and to incorporate the three switched capacitors. The proposed multilevel inverter (MLI) circuit outputs a 9-level waveform with a maximum boosting factor of four. Unlike the already established switched capacitor based MLI consisting of two stages the proposed MLI is single stage inverter. The switches in the proposed MLI is subjected to a low value of voltage stress equal to Vdc. The proposed MLI is further analyzed by using various multicarrier sinusoidal PWM technique such as Phase Shift PWM (PSPWM), Phase disposition PWM (PDPWM), Phase Opposition Disposition PWM (PODPWM), Alternate Phase Opposition Disposition PWM (APODPWM) and Variable Frequency PWM (VFPWM).

Reduced Voltage Stress Thirteen-Level Extendable Switched Capacitor Multilevel Inverter

2019 ◽  
Author(s):  
Abhinandan Routray ◽  
Kharan Shiluveru ◽  
Akash Singh ◽  
Rajeev Kumar Singh ◽  
Ranjit Mahanty
Keyword(s):  
Multilevel Inverter ◽  
Switched Capacitor ◽  
Voltage Stress

scholarly journals A Control Technique on Novel PWM Inverter Based on Single Stage Switched Capacitor Module

2019 ◽  
Vol 8 (11) ◽  
pp. 1053-1061
Keyword(s):  
Closed Loop ◽  
Single Stage ◽  
Control Technique ◽  
Voltage Source ◽  
Switched Capacitor ◽  
Reverse Voltage ◽  
Pwm Inverter ◽  
Voltage Stress ◽  
Multi Level ◽  
Cascaded Multilevel Inverter

There is a disadvantage with a two stage switched capacitor module multi level inverter with the end goal the switches of subsequent level like H connect perseveres which are through higher voltage stress. To determine the issue, in this paper, we proposed a module that guarantees pinnacle reverse voltage among all switches which is limited to dc voltage source for cascaded multilevel inverter. This module is called single stage switched capacitor module (S3 CM). Nine voltage levels are created with just a one dc source, two joined capacitors. Thus, quantity of isolated dc sources was fundamentally decreased contrasted with cascaded H-bridge. What's more, voltage gain increase by two is accomplished. A similar investigation averse the ongoing methodology uncovers the proposed S3 CM module accomplishes decrease in number of switches. And furthermore switching states of inverter will be controlled by utilizing closed loop PI controller.

scholarly journals Recent trends and review on switched‐capacitor ‐based single‐stage boost multilevel inverter

2021 ◽  
Author(s):  
Manita Kumari ◽  
Marif Daula Siddique ◽  
Adil Sarwar ◽  
Mohd Tariq ◽  
Saad Mekhilef ◽  
...  
Keyword(s):  
Single Stage ◽  
Multilevel Inverter ◽  
Switched Capacitor ◽  
Recent Trends

Hardware Implementation of Cascaded Hybrid Multilevel Inverter with Reduced Number of Switches

2016 ◽  
Vol 3 (2) ◽  
pp. 314
Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi ◽  
R. Bensaraj
Keyword(s):  
Phase Shift ◽  
Pulse Width ◽  
Output Voltage ◽  
Degrees Of Freedom ◽  
Hardware Implementation ◽  
Pulse Width Modulation ◽  
Multilevel Inverter ◽  
Variable Frequency ◽  
Multi Level ◽  
Simulation Results

<p class="JESTECAbstract">This paper presents the comparison of various multicarrier Pulse Width Modulation (PWM) techniques for the Cascaded Hybrid Multi Level Inverter (CHBMLI). Due to switch combination redundancies, there are certain degrees of freedom to generate the five level AC output voltage. This paper presents the use of Control Freedom Degree (CFD) combination. The effectiveness of the PWM strategies developed using CFD are demonstrated by simulation and experimentation.  The simulation results indicate that the chosen five level inverter triggered by the developed Phase Disposition(PD), Phase Opposition and Disposition(POD), Alternate Phase Opposition and Disposition (APOD), Carrier Overlapping (CO), Phase Shift (PS) and Variable Frequency (VF)<strong> </strong>PWM strategies developed are implemented in real time using FPGA. The simulation and experimental outputs closely match with each other validating the strategies presented.</p>

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