Summary
System designs that have only conduction cooling available, that must operate in harsh or challenging environments, present significant challenges to the system thermal engineer. A second thermal design challenge is continued miniaturization of semiconductor devices and increased functionality per square centimeter of semiconductor die, resulting in continued increases in device heat flux.
Elimination of packaging materials allows more efficient heat transfer as thermal resistances from one material to another are reduced or designed out. When possible, concurrent elimination of package materials that have low bulk thermal conductivity and replacement with high thermal conductivity materials will improve heat transfer efficiency. Attachment of the resulting unpackaged semiconductor device can then be made directly to the circuit carrier; however, care must be taken regarding increases in potential for damage or failure due to mismatched coefficient of thermal expansion (CTE). Continuing reductions in die size that result in higher heat flux exacerbate this potential failure mechanism at the die-to-substrate level. This is further worsened in harsh environment (i.e., vibration, shock, high moisture, rapid power cycling) and/or high operating temperature conditions.
For aerospace, military, geothermal, and other applications where increasingly high heat flux radio frequency (RF), microwave, and processor semiconductors are attached directly (with solders, silver sintering pastes, or other joining materials) to an organic or ceramic printed circuit card, efficient and rapid heat transfer becomes critical. These are frequently also applications where forced convection (air or liquid) may be unavailable to the system design engineer.
One solution for thermal management design problems of this type has traditionally been the incorporation of one or more heavy copper layers within a complex multilayer printed circuit board (PCB). This solution, however, has come under increasing scrutiny in recent years due to concerns for weight (especially in airborne and space applications) and the potential for severe CTE mismatch between semiconductor die materials with relatively low thermal expansion values and the relatively very high value of copper.
Therefore, development of CTE-matched alternative materials to replace a heavy copper layer has been a focus for development activities. A suitable selection must, however, have a bulk thermal conductivity that is as close to that of copper as is practicable. Recent developments of a copper-graphite composite material in sheet form that can be employed in standardized PCB manufacturing processes are described in this presentation.
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