scholarly journals Development of room temperature operating single electron transistor using FIB etching and deposition technology

2009 ◽  
Author(s):  
Manoranjan Acharya
Keyword(s):  
Room Temperature ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Temperature Operating ◽  
Deposition Technology

Evaluation of Room-Temperature Performance of Ultra-Small Single-Electron Transistor-Based Analog-to-Digital Convertors

2018 ◽  
Vol 27 (14) ◽  
pp. 1850217 ◽  
Author(s):  
Mostafa Miralaie ◽  
Ali Mir
Keyword(s):  
Coulomb Blockade ◽  
Room Temperature ◽  
Periodic Oscillation ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Analog To Digital ◽  
Coulomb Oscillation ◽  
Temperature Operating ◽  
Coulomb Blockade Regime ◽  
Oscillation Characteristics

In this paper, in order to analyze the performance of single-electron transistor (SET)-based analog-to-digital converter (ADC) circuits at room temperature, first, the quantum Coulomb blockade regime is explained and based on it we calculate and discuss the inherent Coulomb oscillation characteristics of room-temperature-operating SETs (or, in other words, ultra-small SETs). Then, to explain the performance of SET-based ADC structures, we explore the sensitivity of converter section of these structures to the inherent periodic oscillation characteristics. By simulating two different temperatures of 100[Formula: see text]K and 300[Formula: see text]K, we demonstrate that for proper performance of converter section of the SET-based ADCs, SETs must have inherent Coulomb oscillations with the same and high peak-to-valley current ratio (PVCR) and equal Coulomb peak spacing (i.e., equal [Formula: see text]. The Coulomb oscillation characteristics of the room-temperature-operating silicon SET show the Coulomb oscillations with unequal PVCRs and unequal Coulomb peak spacings (i.e., unequal [Formula: see text]. As a result, it can be seen that the room-temperature-operating SET-based ADCs never have a suitable output.

Room-Temperature Carbon Nanotube Single-Electron Transistor with Defects Introduced by La(NO3)3Process

2008 ◽  
Vol 47 (7) ◽  
pp. 5724-5726 ◽  
Author(s):  
Masatoshi Maeda ◽  
Shin Iwasaki ◽  
Takafumi Kamimura ◽  
Katsuyuki Murata ◽  
Kazuhiko Matsumoto
Keyword(s):  
Carbon Nanotube ◽  
Room Temperature ◽  
Single Electron ◽  
Single Electron Transistor
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