scholarly journals Desarrollo de encriptado AES en FPGA

2006 ◽  
Author(s):  
◽  
Mónica Cristina Liberatori
Keyword(s):  
Fpga Implementation ◽  
Advanced Encryption Standard ◽  
Trade Offs ◽  
Logic Cells ◽  
Test Vectors ◽  
Vhdl Code

The Rijndael cipher, designed by Joan Daemen and Vincent Rijmen and recently selected as the official Advanced Encryption Standard (AES) is well suited for hardware use. This implementation can be carried out through several trade-offs between area and speed. This thesis presents an 8-bit FPGA implementation of the 128-bit block and 128 bit-key AES cipher. Selected FPGA Family is Altera Flex 10K. The cipher operates at 25 MHz and consumes 470 clock cycles for algorithm encryption, resulting in a throughput of 6.8 Mbps. Synthesis results in the use of 460 logic cells and 4480 memory bits. The VHDL code was simulated using the test vectors provided in the AES submission package. The results are functionally correct. The architecture needs fewer logic cells than other ciphers and uses as few memory blocks as possible. The design goals were area and cost optimisation.

VIRTEX-5 FPGA IMPLEMENTATION OF ADVANCED ENCRYPTION STANDARD ALGORITHM

2010 ◽  
Author(s):  
Muhammad H. Rais ◽  
Syed M. Qasim ◽  
Nader Barsoum ◽  
G. W. Weber ◽  
Pandian Vasant
Keyword(s):  
Fpga Implementation ◽  
Advanced Encryption Standard ◽  
Standard Algorithm

scholarly journals Generating Cipher Text using BLOWFISH Algorithm for Secured Data Communications

2019 ◽  
Vol 9 (2) ◽  
pp. 117-121
Keyword(s):  
High Speed ◽  
High Performance ◽  
Encryption Algorithm ◽  
Advanced Encryption Standard ◽  
Aes Algorithm ◽  
Cipher Text ◽  
Original Message ◽  
Public Domain Software ◽  
Secured Data ◽  
Vhdl Code

Cryptography plays a major role in the network security. In order to secure the data one must do encryption of the original message. In this paper, the design and analysis of high speed and high performance BLOWFISH algorithm is implemented in VHDL coding and compared with AES (Advanced Encryption Standard) algorithm. The BLOWFISH algorithm involves the process of giving the data and key as input to the encryption block. BLOWFISH encryption algorithm is designed and programmed in VHDL coding. Then it is implemented in Xilinx 10.1. This research is carried in the following steps: designing of encryption algorithm, writing VHDL code, simulating the code on “ModelSim altera 6.5e”, synthesizing and implementing the code using Xilinx’s ISE 10.1.This research aims in developing flexible and technology independent architectures in the areas of VPN software, file compression, public domain software such as smart cards, etc. Also presents the comparison of BLOWFISH and AES algorithms. Experimental results show that BLOWFISH algorithm runs faster than AES algorithm while both of them consume almost the same Power.

scholarly journals A Model-Based Active Testing Approach to Sequential Diagnosis

2010 ◽  
Vol 39 ◽  
pp. 301-334 ◽  
Author(s):  
A. Feldman ◽  
G. Provan ◽  
A. Van Gemund
Keyword(s):  
Pattern Generation ◽  
Model Based ◽  
Trade Offs ◽  
Additional Input ◽  
Active Testing ◽  
Testing Algorithms ◽  
Input Variables ◽  
Testing Algorithm ◽  
Sequential Diagnosis ◽  
Test Vectors

Model-based diagnostic reasoning often leads to a large number of diagnostic hypotheses. The set of diagnoses can be reduced by taking into account extra observations (passive monitoring), measuring additional variables (probing) or executing additional tests (sequential diagnosis/test sequencing). In this paper we combine the above approaches with techniques from Automated Test Pattern Generation (ATPG) and Model-Based Diagnosis (MBD) into a framework called FRACTAL (FRamework for ACtive Testing ALgorithms). Apart from the inputs and outputs that connect a system to its environment, in active testing we consider additional input variables to which a sequence of test vectors can be supplied. We address the computationally hard problem of computing optimal control assignments (as defined in FRACTAL) in terms of a greedy approximation algorithm called FRACTAL-G. We compare the decrease in the number of remaining minimal cardinality diagnoses of FRACTAL-G to that of two more FRACTAL algorithms: FRACTAL-ATPG and FRACTAL-P. FRACTAL-ATPG is based on ATPG and sequential diagnosis while FRACTAL-P is based on probing and, although not an active testing algorithm, provides a baseline for comparing the lower bound on the number of reachable diagnoses for the FRACTAL algorithms. We empirically evaluate the trade-offs of the three FRACTAL algorithms by performing extensive experimentation on the ISCAS85/74XXX benchmark of combinational circuits.

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