scholarly journals Quantum dot Cellular Automata based Fault Tolerant Fingerprint Authentication Systems using Reversible Logic Gates

2021 ◽  
Author(s):  
Suhaib AHMED ◽  
Syed NAZ ◽  
Sparsh SHARMA
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
Fault Tolerant ◽  
Logic Gates ◽  
Reversible Logic ◽  
Quantum Dot Cellular Automata ◽  
Reversible Logic Gates

scholarly journals Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata

Data in Brief ◽  
2017 ◽  
Vol 10 ◽  
pp. 557-560 ◽  
Author(s):  
Ali Newaz Bahar ◽  
Mohammad Maksudur Rahman ◽  
Nur Mohammad Nahid ◽  
Md. Kamrul Hassan
Keyword(s):  
Energy Dissipation ◽  
Cellular Automata ◽  
Quantum Dot ◽  
Logic Gates ◽  
Reversible Logic ◽  
Quantum Dot Cellular Automata ◽  
Reversible Logic Gates

Design of Efficient and Testable n-Input Logic Gates in Quantum-Dot Cellular Automata

2013 ◽  
Vol 10 (10) ◽  
pp. 2347-2353 ◽  
Author(s):  
Samira Sayedsalehi ◽  
Mohammad Hossein Moaiyeri ◽  
Keivan Navi
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
Logic Gates ◽  
Quantum Dot Cellular Automata

scholarly journals Design and Analysis of Fault-Tolerant 1:2 Demultiplexer Using Quantum-Dot Cellular Automata Nano-Technology

Electronics ◽  
2021 ◽  
Vol 10 (21) ◽  
pp. 2565
Author(s):  
Saeid Seyedi ◽  
Nima Jafari Navimipour ◽  
Akira Otsuki
Keyword(s):  
Fault Tolerance ◽  
Cellular Automata ◽  
Quantum Dot ◽  
Fault Tolerant ◽  
Nano Technology ◽  
Ultra Low Power ◽  
Quantum Dot Cellular Automata ◽  
Whole Process ◽  
Dislocation Cells ◽  
Rapid Switching

Quantum-dot Cellular Automata (QCA) is an innovative paradigm bringing hopeful applications in the perceptually novel computing layout in quantum electronics. The circuits manufactured by QCA technology can provide a notable decrease in size, rapid-switching velocity, and ultra-low power utilization. The demultiplexer is a beneficial component to optimize the whole process in any logical design, and therefore is very important in QCA. Moreover, fault-tolerant circuits can improve the reliability of digital circuits by redundancy. Hence, the present investigation illustrates a novel QCA-based fault-tolerant 1:2 demultiplexer construct that employs a two-input AND gate and inverter. The functionality of the suggested layout was executed and evaluated with the utilization of the QCADesigner 2.0.3 simulator. This paper utilizes cell redundancy on the wire, inverter, and AND gates for designing a fault-tolerant demultiplexer. Four components (i.e., missing cells, dislocation cells, extra cells, and misalignment) were analyzed by the QCADesigner simulator. The simulation results demonstrated that our proposed QCA-based fault-tolerant 1:2 demultiplexer acted more efficiently than prior constructs regarding delay and fault tolerance. The proposed fault-tolerant 1:2 demultiplexer could attain high fault-tolerance when single missing cell or extra cell faults exist in the QCA layout.

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