Integrated circuits. Memory devices pin configurations

2015 ◽  
Keyword(s):  
Integrated Circuits ◽  
Memory Devices

Correlation of Thermal Rise Time to Sample Depth in Multi-Die Stacked Devices

2018 ◽  
Author(s):  
M. Shi ◽  
A.G. Street ◽  
Y.F. Dai
Keyword(s):  
Integrated Circuits ◽  
Rise Time ◽  
Thermal Source ◽  
Memory Devices ◽  
Digital Modulation ◽  
Sample Depth ◽  
Lock In ◽  
Thermal Sources ◽  
Stacked Memory

Abstract Dynamic Digital Modulation, an adaptation of Lock-In Thermography, has been shown to be a useful technique to establish the relative Z-depth of thermal sources in integrated circuits. In order to determine the specific depth of a thermal source it is necessary to correlate known depths to measured thermal rise time. In this work, multi-die stacked memory devices are used as calibration sources to correlate a thermal source at individual die to the measured thermal rise time.

Some applications of electron beam microanalysis techniques in VLSI process evaluation

1983 ◽  
Vol 41 ◽  
pp. 160-161
Author(s):  
Simon Thomas
Keyword(s):  
Integrated Circuits ◽  
Process Evaluation ◽  
Large Scale ◽  
Technology Development ◽  
Analytical Techniques ◽  
Successful Implementation ◽  
Analysis Of Failures ◽  
Characterization Of Materials ◽  
Circuits Vlsi

Trends in the technology development of very large scale integrated circuits (VLSI) have been in the direction of higher density of components with smaller dimensions. The scaling down of device dimensions has been not only laterally but also in depth. Such efforts in miniaturization bring with them new developments in materials and processing. Successful implementation of these efforts is, to a large extent, dependent on the proper understanding of the material properties, process technologies and reliability issues, through adequate analytical studies. The analytical instrumentation technology has, fortunately, kept pace with the basic requirements of devices with lateral dimensions in the micron/ submicron range and depths of the order of nonometers. Often, newer analytical techniques have emerged or the more conventional techniques have been adapted to meet the more stringent requirements. As such, a variety of analytical techniques are available today to aid an analyst in the efforts of VLSI process evaluation. Generally such analytical efforts are divided into the characterization of materials, evaluation of processing steps and the analysis of failures.

The study of interfacial reactions of nickel thin films on GaAs

1983 ◽  
Vol 41 ◽  
pp. 156-157
Author(s):  
L.J. Chen ◽  
Y.F. Hsieh
Keyword(s):  
Thin Films ◽  
Integrated Circuits ◽  
Interfacial Reactions ◽  
Metal Contacts ◽  
Nickel Thin Films ◽  
Thin Foils ◽  
The Status ◽  
Si Doped ◽  
Electron Microscopes

One measure of the maturity of a device technology is the ease and reliability of applying contact metallurgy. Compared to metal contact of silicon, the status of GaAs metallization is still at its primitive stage. With the advent of GaAs MESFET and integrated circuits, very stringent requirements were placed on their metal contacts. During the past few years, extensive researches have been conducted in the area of Au-Ge-Ni in order to lower contact resistances and improve uniformity. In this paper, we report the results of TEM study of interfacial reactions between Ni and GaAs as part of the attempt to understand the role of nickel in Au-Ge-Ni contact of GaAs.N-type, Si-doped, (001) oriented GaAs wafers, 15 mil in thickness, were grown by gradient-freeze method. Nickel thin films, 300Å in thickness, were e-gun deposited on GaAs wafers. The samples were then annealed in dry N2 in a 3-zone diffusion furnace at temperatures 200°C - 600°C for 5-180 minutes. Thin foils for TEM examinations were prepared by chemical polishing from the GaA.s side. TEM investigations were performed with JE0L- 100B and JE0L-200CX electron microscopes.

Microfabrication research at the National Submicron Facility

1983 ◽  
Vol 41 ◽  
pp. 86-89
Author(s):  
E.D. Wolf
Keyword(s):  
Integrated Circuits ◽  
Particle Physics ◽  
High Speed ◽  
New Technology ◽  
High Energy ◽  
High Energy Particle ◽  
New Science ◽  
Wide Range ◽  
Intermediate Domain ◽  
Circuit Function

Most microelectronics devices and circuits operate faster, consume less power, execute more functions and cost less per circuit function when the feature-sizes internal to the devices and circuits are made smaller. This is part of the stimulus for the Very High-Speed Integrated Circuits (VHSIC) program. There is also a need for smaller, more sensitive sensors in a wide range of disciplines that includes electrochemistry, neurophysiology and ultra-high pressure solid state research. There is often fundamental new science (and sometimes new technology) to be revealed (and used) when a basic parameter such as size is extended to new dimensions, as is evident at the two extremes of smallness and largeness, high energy particle physics and cosmology, respectively. However, there is also a very important intermediate domain of size that spans from the diameter of a small cluster of atoms up to near one micrometer which may also have just as profound effects on society as “big” physics.

Failure Analysis With the Scanning Electron Microscope

1972 ◽  
Vol 30 ◽  
pp. 482-483
Author(s):  
John R. Devaney
Keyword(s):  
Electron Microscope ◽  
Scanning Electron Microscope ◽  
Integrated Circuits ◽  
Failure Analysis ◽  
High Reliability ◽  
Military Applications ◽  
Small Structure ◽  
Useful Life ◽  
Insight Into ◽  
Scanning Electron

Occasionally in history, an event may occur which has a profound influence on a technology. Such an event occurred when the scanning electron microscope became commercially available to industry in the mid 60's. Semiconductors were being increasingly used in high-reliability space and military applications both because of their small volume but, also, because of their inherent reliability. However, they did fail, both early in life and sometimes in middle or old age. Why they failed and how to prevent failure or prolong “useful life” was a worry which resulted in a blossoming of sophisticated failure analysis laboratories across the country. By 1966, the ability to build small structure integrated circuits was forging well ahead of techniques available to dissect and analyze these same failures. The arrival of the scanning electron microscope gave these analysts a new insight into failure mechanisms.

Stress Relaxation and the Formation of Silicides in the Process of the Crystallization of NI-NB Films on SI

1991 ◽  
Vol 49 ◽  
pp. 898-899
Author(s):  
N. Rozhanski ◽  
V. Lifshitz
Keyword(s):  
Thin Films ◽  
Stress Relaxation ◽  
Integrated Circuits ◽  
Direct Evidence ◽  
Alloy Film ◽  
Diffusion Barriers ◽  
Effective Barrier

Thin films of amorphous Ni-Nb alloys are of interest since they can be used as diffusion barriers for integrated circuits on Si. A native SiO2 layer is an effective barrier for Ni diffusion but it deformation during the crystallization of the alloy film lead to the appearence of diffusion fluxes through it and the following formation of silicides. This study concerns the direct evidence of the action of stresses in the process of the crystallization of Ni-Nb films on Si and the structure of forming NiSi2 islands.

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