scholarly journals An Optical Filter-Less CMOS Image Sensor with Differential Spectral Response Pixels for Simultaneous UV-Selective and Visible Imaging

Sensors ◽  
2019 ◽  
Vol 20 (1) ◽  
pp. 13
Author(s):  
Yhang Ricardo Sipauba Carvalho da Silva ◽  
Rihito Kuroda ◽  
Shigetoshi Sugawa
Keyword(s):  
Visible Light ◽  
Spectral Sensitivity ◽  
Dynamic Range ◽  
Uv Light ◽  
Spectral Response ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Oxide Semiconductor ◽  
Conversion Gain ◽  
Uv Sensitivity

This paper presents a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) capable of capturing UV-selective and visible light images simultaneously by a single exposure and without employing optical filters, suitable for applications that require simultaneous UV and visible light imaging, or UV imaging in variable light environment. The developed CIS is composed by high and low UV sensitivity pixel types, arranged alternately in a checker pattern. Both pixel types were designed to have matching sensitivities for non-UV light. The UV-selective image is captured by extracting the differential spectral response between adjacent pixels, while the visible light image is captured simultaneously by the low UV sensitivity pixels. Also, to achieve high conversion gain and wide dynamic range simultaneously, the lateral overflow integration capacitor (LOFIC) technology was introduced in both pixel types. The developed CIS has a pixel pitch of 5.6 µm and exhibits 172 µV/e− conversion gain, 131 ke− full well capacity (FWC), and 92.3 dB dynamic range. The spectral sensitivity ranges of the high and low UV sensitivity pixels are of 200–750 nm and 390–750 nm, respectively. The resulting sensitivity range after the differential spectral response extraction is of 200–480 nm. This paper presents details regarding the CIS pixels structures, doping profiles, device simulations, and the measurement results for photoelectric response and spectral sensitivity for both pixel types. Also, sample images of UV-selective and visible spectral imaging using the developed CIS are presented.

scholarly journals A 120-ke− Full-Well Capacity 160-µV/e− Conversion Gain 2.8-µm Backside-Illuminated Pixel with a Lateral Overflow Integration Capacitor

Sensors ◽  
2019 ◽  
Vol 19 (24) ◽  
pp. 5572
Author(s):  
Isao Takayanagi ◽  
Ken Miyauchi ◽  
Shunsuke Okura ◽  
Kazuya Mori ◽  
Junichi Nakamura ◽  
...  
Keyword(s):  
Dynamic Range ◽  
Incident Light ◽  
Complementary Metal Oxide Semiconductor ◽  
Image Sensor ◽  
Oxide Semiconductor ◽  
Conversion Gain ◽  
Cover Glass ◽  
Low Light ◽  
Light Signals ◽  
Backside Illuminated

In this paper, a prototype complementary metal-oxide-semiconductor (CMOS) image sensor with a 2.8-μm backside-illuminated (BSI) pixel with a lateral overflow integration capacitor (LOFIC) architecture is presented. The pixel was capable of a high conversion gain readout with 160 μV/e− for low light signals while a large full-well capacity of 120 ke− was obtained for high light signals. The combination of LOFIC and the BSI technology allowed for high optical performance without degradation caused by extra devices for the LOFIC structure. The sensor realized a 70% peak quantum efficiency with a normal (no anti-reflection coating) cover glass and a 91% angular response at ±20° incident light. This 2.8-μm pixel is potentially capable of higher than 100 dB dynamic range imaging in a pure single exposure operation.

scholarly journals A Stacked Back Side-Illuminated Voltage Domain Global Shutter CMOS Image Sensor with a 4.0 μm Multiple Gain Readout Pixel

Sensors ◽  
2020 ◽  
Vol 20 (2) ◽  
pp. 486
Author(s):  
Ken Miyauchi ◽  
Kazuya Mori ◽  
Toshinori Otaka ◽  
Toshiyuki Isozaki ◽  
Naoto Yasuda ◽  
...  
Keyword(s):  
Dynamic Range ◽  
High Sensitivity ◽  
Cmos Image Sensor ◽  
Light Sensitivity ◽  
Image Sensor ◽  
Motion Artifacts ◽  
Oxide Semiconductor ◽  
Storage Capacitor ◽  
Cmos Process ◽  
Back Side

A backside-illuminated complementary metal-oxide-semiconductor (CMOS) image sensor with 4.0 μm voltage domain global shutter (GS) pixels has been fabricated in a 45 nm/65 nm stacked CMOS process as a proof-of-concept vehicle. The pixel components for the photon-to-voltage conversion are formed on the top substrate (the first layer). Each voltage signal from the first layer pixel is stored in the sample-and-hold capacitors on the bottom substrate (the second layer) via micro-bump interconnection to achieve a voltage domain GS function. The two sets of voltage domain storage capacitor per pixel enable a multiple gain readout to realize single exposure high dynamic range (SEHDR) in the GS operation. As a result, an 80dB SEHDR GS operation without rolling shutter distortions and motion artifacts has been achieved. Additionally, less than −140dB parasitic light sensitivity, small noise floor, high sensitivity and good angular response have been achieved.

Publisher’s Note: “A wide dynamic range CMOS image sensor with 200–1100 nm spectral sensitivity and high robustness to UV right exposure”

2014 ◽  
Vol 53 (6) ◽  
pp. 069204 ◽  
Author(s):  
Satoshi Nasuno ◽  
Shun Kawada ◽  
Yasumasa Koda ◽  
Taiki Nakazawa ◽  
Katsuhiko Hanzawa ◽  
...  
Keyword(s):  
Spectral Sensitivity ◽  
Dynamic Range ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Wide Dynamic Range

scholarly journals Reduced Tilting Effect of Smartphone CMOS Image Sensor in Visible Light Indoor Positioning

Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1635
Author(s):  
Md Habibur Rahman ◽  
Mohammad Abrar Shakil Sejan ◽  
Jong-Jin Kim ◽  
Wan-Young Chung
Keyword(s):  
Machine Learning ◽  
Visible Light ◽  
Light Emitting Diode ◽  
Cmos Image Sensor ◽  
Indoor Positioning ◽  
Image Sensor ◽  
Image Features ◽  
Oxide Semiconductor ◽  
Positioning System ◽  
Indoor Positioning System

Visible light positioning (VLP) using complementary metal–oxide–semiconductor (CMOS) image sensors is a cost-effective solution to the increasing demand for an indoor positioning system. However, in most of the existing VLP systems with an image sensor, researchers assume that the receiving image sensor is positioned parallel to the indoor floor without any tilting and, thus, have only focused on the high-precision positioning algorithm and ignored the proper light-emitting diode (LED)-ID recognition. To address these limitations, we present, herein, a smartphone CMOS image sensor and visible light-based indoor localization system for a receiver device in a tilted position, and we have applied a machine learning approach for optimized LED-ID detection. For detection of the LED-ID, we generated different features for different LED-IDs and utilize a machine learning method to identify each ID as opposed to using the conventional coding and decoding method. An image processing method was used for the image features extraction and selection. We utilized the rolling shutter mechanism of the smartphone CMOS image sensor in our indoor positioning system. Additionally, to improve the LED-ID detection and positioning accuracy with the tilting of the receiver, we utilized the embedded fusion sensors of the smartphone (e.g., accelerometer, gyroscope, and magnetometer, which can be used to extract the yaw, pitch, and roll angles). The experimental results for the proposed positioning system show that it can provide 2.49, 4.63, 8.46, and 12.20 cm accuracy with angles of 0, 5, 10, and 15°, respectively, within a 2 m × 2 m × 2 m positioning area.

scholarly journals Fully Depleted, Trench-Pinned Photo Gate for CMOS Image Sensor Applications

Sensors ◽  
2020 ◽  
Vol 20 (3) ◽  
pp. 727
Author(s):  
Francois Roy ◽  
Andrej Suler ◽  
Thomas Dalleau ◽  
Romain Duru ◽  
Daniel Benoit ◽  
...  
Keyword(s):  
Charge Transfer ◽  
Dynamic Range ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Oxide Semiconductor ◽  
Deep Trench ◽  
Fully Depleted ◽  
Sensor Applications ◽  
Temporal Noise

Tackling issues of implantation-caused defects and contamination, this paper presents a new complementary metal–oxide–semiconductor (CMOS) image sensor (CIS) pixel design concept based on a native epitaxial layer for photon detection, charge storage, and charge transfer to the sensing node. To prove this concept, a backside illumination (BSI), p-type, 2-µm-pitch pixel was designed. It integrates a vertical pinned photo gate (PPG), a buried vertical transfer gate (TG), sidewall capacitive deep trench isolation (CDTI), and backside oxide–nitride–oxide (ONO) stack. The designed pixel was fabricated with variations of key parameters for optimization. Testing results showed the following achievements: 13,000 h+ full-well capacity with no lag for charge transfer, 80% quantum efficiency (QE) at 550-nm wavelength, 5 h+/s dark current at 60 °C, 2 h+ temporal noise floor, and 75 dB dynamic range. In comparison with conventional pixel design, the proposed concept could improve CIS performance.

A wide dynamic range CMOS image sensor with 200–1100 nm spectral sensitivity and high robustness to UV right exposure

2014 ◽  
Vol 53 (4S) ◽  
pp. 04EE07 ◽  
Author(s):  
Satoshi Nasuno ◽  
Shun Kawada ◽  
Yasumasa Koda ◽  
Taiki Nakazawa ◽  
Katsuhiko Hanzawa ◽  
...  
Keyword(s):  
Spectral Sensitivity ◽  
Dynamic Range ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Wide Dynamic Range

An Over 120dB Dynamic Range Linear Response Single Exposure CMOS Image Sensor with Two-stage Lateral Overflow Integration Trench Capacitors

2020 ◽  
Vol 2020 (7) ◽  
pp. 143-1-143-6 ◽  
Author(s):  
Yasuyuki Fujihara ◽  
Maasa Murata ◽  
Shota Nakayama ◽  
Rihito Kuroda ◽  
Shigetoshi Sugawa
Keyword(s):  
Linear Response ◽  
Dynamic Range ◽  
Signal To Noise Ratio ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Signal To Noise ◽  
Single Exposure ◽  
Two Stage ◽  
Noise Ratio ◽  
Maximum Signal

This paper presents a prototype linear response single exposure CMOS image sensor with two-stage lateral overflow integration trench capacitors (LOFITreCs) exhibiting over 120dB dynamic range with 11.4Me- full well capacity (FWC) and maximum signal-to-noise ratio (SNR) of 70dB. The measured SNR at all switching points were over 35dB thanks to the proposed two-stage LOFITreCs.

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