scholarly journals A 120-ke− Full-Well Capacity 160-µV/e− Conversion Gain 2.8-µm Backside-Illuminated Pixel with a Lateral Overflow Integration Capacitor

Sensors ◽  
2019 ◽  
Vol 19 (24) ◽  
pp. 5572
Author(s):  
Isao Takayanagi ◽  
Ken Miyauchi ◽  
Shunsuke Okura ◽  
Kazuya Mori ◽  
Junichi Nakamura ◽  
...  

In this paper, a prototype complementary metal-oxide-semiconductor (CMOS) image sensor with a 2.8-μm backside-illuminated (BSI) pixel with a lateral overflow integration capacitor (LOFIC) architecture is presented. The pixel was capable of a high conversion gain readout with 160 μV/e− for low light signals while a large full-well capacity of 120 ke− was obtained for high light signals. The combination of LOFIC and the BSI technology allowed for high optical performance without degradation caused by extra devices for the LOFIC structure. The sensor realized a 70% peak quantum efficiency with a normal (no anti-reflection coating) cover glass and a 91% angular response at ±20° incident light. This 2.8-μm pixel is potentially capable of higher than 100 dB dynamic range imaging in a pure single exposure operation.

2008 ◽  
Vol 47 (7) ◽  
pp. 5390-5395 ◽  
Author(s):  
Koichi Mizobuchi ◽  
Satoru Adachi ◽  
Jose Tejada ◽  
Hiromichi Oshikubo ◽  
Nana Akahane ◽  
...  

Sensors ◽  
2019 ◽  
Vol 20 (1) ◽  
pp. 13
Author(s):  
Yhang Ricardo Sipauba Carvalho da Silva ◽  
Rihito Kuroda ◽  
Shigetoshi Sugawa

This paper presents a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) capable of capturing UV-selective and visible light images simultaneously by a single exposure and without employing optical filters, suitable for applications that require simultaneous UV and visible light imaging, or UV imaging in variable light environment. The developed CIS is composed by high and low UV sensitivity pixel types, arranged alternately in a checker pattern. Both pixel types were designed to have matching sensitivities for non-UV light. The UV-selective image is captured by extracting the differential spectral response between adjacent pixels, while the visible light image is captured simultaneously by the low UV sensitivity pixels. Also, to achieve high conversion gain and wide dynamic range simultaneously, the lateral overflow integration capacitor (LOFIC) technology was introduced in both pixel types. The developed CIS has a pixel pitch of 5.6 µm and exhibits 172 µV/e− conversion gain, 131 ke− full well capacity (FWC), and 92.3 dB dynamic range. The spectral sensitivity ranges of the high and low UV sensitivity pixels are of 200–750 nm and 390–750 nm, respectively. The resulting sensitivity range after the differential spectral response extraction is of 200–480 nm. This paper presents details regarding the CIS pixels structures, doping profiles, device simulations, and the measurement results for photoelectric response and spectral sensitivity for both pixel types. Also, sample images of UV-selective and visible spectral imaging using the developed CIS are presented.


Author(s):  
Changmiao Hu ◽  
Yang Bai ◽  
Ping Tang

We present a denoising algorithm for the pixel-response non-uniformity correction of a scientific complementary metal–oxide–semiconductor (CMOS) image sensor, which captures images under extremely low-light conditions. By analyzing the integrating sphere experimental data, we present a pixel-by-pixel flat-field denoising algorithm to remove this fixed pattern noise, which occur in low-light conditions and high pixel response readouts. The response of the CMOS image sensor imaging system to the uniform radiance field shows a high level of spatial uniformity after the denoising algorithm has been applied.


2015 ◽  
Vol 13 (8) ◽  
pp. 658-662
Author(s):  
Byoung-Soo Choi ◽  
Sung-Hyun Jo ◽  
Myunghan Bae ◽  
Jeongyeob Kim ◽  
Pyung Choi ◽  
...  

Author(s):  
Changmiao Hu ◽  
Yang Bai ◽  
Ping Tang

We present a denoising algorithm for the pixel-response non-uniformity correction of a scientific complementary metal–oxide–semiconductor (CMOS) image sensor, which captures images under extremely low-light conditions. By analyzing the integrating sphere experimental data, we present a pixel-by-pixel flat-field denoising algorithm to remove this fixed pattern noise, which occur in low-light conditions and high pixel response readouts. The response of the CMOS image sensor imaging system to the uniform radiance field shows a high level of spatial uniformity after the denoising algorithm has been applied.


Sensors ◽  
2020 ◽  
Vol 20 (3) ◽  
pp. 727
Author(s):  
Francois Roy ◽  
Andrej Suler ◽  
Thomas Dalleau ◽  
Romain Duru ◽  
Daniel Benoit ◽  
...  

Tackling issues of implantation-caused defects and contamination, this paper presents a new complementary metal–oxide–semiconductor (CMOS) image sensor (CIS) pixel design concept based on a native epitaxial layer for photon detection, charge storage, and charge transfer to the sensing node. To prove this concept, a backside illumination (BSI), p-type, 2-µm-pitch pixel was designed. It integrates a vertical pinned photo gate (PPG), a buried vertical transfer gate (TG), sidewall capacitive deep trench isolation (CDTI), and backside oxide–nitride–oxide (ONO) stack. The designed pixel was fabricated with variations of key parameters for optimization. Testing results showed the following achievements: 13,000 h+ full-well capacity with no lag for charge transfer, 80% quantum efficiency (QE) at 550-nm wavelength, 5 h+/s dark current at 60 °C, 2 h+ temporal noise floor, and 75 dB dynamic range. In comparison with conventional pixel design, the proposed concept could improve CIS performance.


2016 ◽  
Vol 4 (2) ◽  
pp. 130-136
Author(s):  
N.P. Maity ◽  
◽  
Reshmi Maity ◽  
Srimanta Baishya ◽  
◽  
...  

In this paper, our focus is on designing of complementary metal-oxide-semiconductor (CMOS) photodiode based active pixel sensor (APS) and performance analysis and achievements for CMOS image sensor. Different important design parameters like photocurrent, conversion gain, conversion factor, dynamic range, readout speed, and quantum efficiency have been calculated. Noise is also considered for the design at different phase of operations of CMOS APS. Various design parameters of our design are computed and compared with simulated results. Noise calculation shows that the pixel noise is dominated by reset noise.


Sensors ◽  
2021 ◽  
Vol 21 (5) ◽  
pp. 1683
Author(s):  
Winai Jaikla ◽  
Fabian Khateb ◽  
Tomasz Kulej ◽  
Koson Pitaksuttayaprot

This paper proposes the simulated and experimental results of a universal filter using the voltage differencing differential difference amplifier (VDDDA). Unlike the previous complementary metal oxide semiconductor (CMOS) structures of VDDDA that is present in the literature, the present one is compact and simple, owing to the employment of the multiple-input metal oxide semiconductor (MOS) transistor technique. The presented filter employs two VDDDAs, one resistor and two grounded capacitors, and it offers low-pass: LP, band-pass: BP, band-reject: BR, high-pass: HP and all-pass: AP responses with a unity passband voltage gain. The proposed universal voltage mode filter has high input impedances and low output impedance. The natural frequency and bandwidth are orthogonally controlled by using separated transconductance without affecting the passband voltage gain. For a BP filter, the root mean square (RMS) of the equivalent output noise is 46 µV, and the third intermodulation distortion (IMD3) is −49.5 dB for an input signal with a peak-to peak of 600 mV, which results in a dynamic range (DR) of 73.2 dB. The filter was designed and simulated in the Cadence environment using a 0.18-µm CMOS process from Taiwan semiconductor manufacturing company (TSMC). In addition, the experimental results were obtained by using the available commercial components LM13700 and AD830. The simulation results are in agreement with the experimental one that confirmed the advantages of the filter.


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