scholarly journals Mutual Capacitive Sensing Touch Screen Controller for Ultrathin Display with Extended Signal Passband Using Negative Capacitance

Sensors ◽  
2018 ◽  
Vol 18 (11) ◽  
pp. 3637 ◽  
Author(s):  
Chang-Ju Lee ◽  
Jong Park ◽  
Canxing Piao ◽  
Han-Eol Seo ◽  
Jaehyuk Choi ◽  
...  
Keyword(s):  
Signal To Noise Ratio ◽  
Phase Fluctuation ◽  
Touch Screen ◽  
Smart Devices ◽  
Cmos Process ◽  
Negative Capacitance ◽  
Driving Frequency ◽  
Large Coupling ◽  
Quadrature Demodulation ◽  
Coupling Capacitance

Flexible and thin displays for smart devices have a large coupling capacitance between the sensor electrode of the touch screen panel (TSP) and the display electrode. This increased coupling capacitance limits the signal passband to less than 100 kHz, resulting in a significant reduction in the received signal, with a driving frequency of several hundred kilohertz used for noise avoidance. To overcome this problem, we reduced the effective capacitance at the analog front-end by connecting a circuit with a negative capacitance in parallel with the coupling capacitance of the TSP. In addition, the in-phase and quadrature demodulation scheme was used to address the phase fluctuation between the signal and the clock during demodulation. We fabricated a test chip using the 0.35 µm CMOS process and obtained a signal-to-noise ratio of 43.2 dB for a 6 mm diameter metal pillar touch input.

scholarly journals Fully Differential Touch Screen Controller with Wide Input Dynamic Range for Thin Displays

Sensors ◽  
2020 ◽  
Vol 20 (3) ◽  
pp. 837
Author(s):  
Chang-Ju Lee ◽  
Jong Kang Park ◽  
Han-Eol Seo ◽  
Junho Huh ◽  
Jung-Hoon Chun
Keyword(s):  
Dynamic Range ◽  
Signal To Noise Ratio ◽  
Touch Screen ◽  
Cmos Process ◽  
Charge Amplifier ◽  
Test Chip ◽  
Maximum Peak ◽  
Fully Differential ◽  
Coupling Capacitance ◽  
The Time Domain

As today’s smartphone displays become thinner, the coupling capacitance between the display electrodes and touch screen panel (TSP) electrodes is increasing significantly. The increased capacitance easily introduces time-varying display signals into the TSP, deteriorating the touch performance. In this research, we demonstrate that the maximum peak display noise in the time domain is approximately 30% of the maximum voltage difference of the display grayscale through analysis of the structure and operation of displays. Then, to mitigate display noise, we propose a circuit solution that uses a fully differential charge amplifier with an input dynamic range wider than the maximum peak of the display noise. A test chip was fabricated using a 0.35 μm CMOS process and achieved a signal-to-noise ratio of 41 dB for a 6-mm-diameter metal pillar touch when display pulses with 5-V swing were driven at 100 kHz.

scholarly journals A Sigma-Delta ADC for Signal Conditioning IC of Automotive Piezo-Resistive Pressure Sensors with over 80 dB SNR

Sensors ◽  
2018 ◽  
Vol 18 (12) ◽  
pp. 4199 ◽  
Author(s):  
Behnam Samadpoor Rikan ◽  
Sang-Yun Kim ◽  
Nabeel Ahmad ◽  
Hamed Abbasizadeh ◽  
Muhammad Riaz Ur Rehman ◽  
...  
Keyword(s):  
Input Signal ◽  
Flicker Noise ◽  
Signal To Noise Ratio ◽  
Pressure Sensors ◽  
High Gain ◽  
Cmos Process ◽  
Signal Conditioning ◽  
Sigma Delta ◽  
Cic Filter ◽  
Decimation Filter

This paper presents a second-order discrete-time Sigma-Delta (SD) Analog-to-Digital Converter (ADC) with over 80 dB Signal to Noise Ratio (SNR), which is applied in a signal conditioning IC for automotive piezo-resistive pressure sensors. To reduce the flicker noise of the structure, choppers are used in every stage of the high gain amplifiers. Besides, to reduce the required area and power, only the CIC filter structure is adopted as a decimation filter. This filter has a configurable structure that can be applied to different data rates and input signal bandwidths. The proposed ADC was fabricated and measured in a 0.18-µm CMOS process. Due to the application of only a CIC filter, the total active area of the SD-ADC and reference generator is 0.49 mm2 where the area of the decimation filter is only 0.075 mm2. For the input signal bandwidth of 1.22 kHz, it achieved over 80 dB SNR in a 2.5 MHz sampling frequency while consuming 646 µW power.

VCO-BASED CONTINUOUS-TIME SIGMA DELTA ADC BASED ON A DUAL-VCO-QUANTIZER-LOOP STRUCTURE

2013 ◽  
Vol 22 (09) ◽  
pp. 1340013 ◽  
Author(s):  
Z. T. XU ◽  
X. L. ZHANG ◽  
J. Z. CHEN ◽  
S. G. HU ◽  
Q. YU ◽  
...  
Keyword(s):  
Continuous Time ◽  
Signal To Noise Ratio ◽  
Quantization Noise ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Loop Structure ◽  
Signal To Noise ◽  
Sigma Delta ◽  
Analog To Digital ◽  
Sigma Delta Adc

This paper explores a continuous time (CT) sigma delta (ΣΔ) analog-to-digital converter (ADC) based on a dual-voltage-controlled oscillator (VCO)-quantizer-loop structure. A third-order filter is adopted to reduce quantization noise and VCO nonlinearity. Even-order harmonics of VCO are significantly reduced by the proposed dual-VCO-quantizer-loop structure. The prototype with 10 MHz bandwidth and 400 MHz clock rate is designed using a 0.18 μm RF CMOS process. Simulation results show that the signal-to-noise ratio and signal-to-noise distortion ratio (SNDR) are 76.9 and 76 dB, respectively, consuming 37 mA at 1.8 V. The key module of the ADC, which is a 4-bit VCO-based quantizer, can convert the voltage signal into a frequency signal and quantize the corresponding frequency to thermometer codes at 400 MS/s.

Tribo-Diagnostics of Nanoparticle Coated Smart Surface Using Phase Fluctuation Based Processor

2007 ◽  
Author(s):  
Deepak H. Veeregowda ◽  
Jagdish P. Sharma ◽  
Ronald A. Wagstaff ◽  
Qian J. Wang
Keyword(s):  
Plastic Deformation ◽  
Composite Structures ◽  
High Speed ◽  
Signal To Noise Ratio ◽  
Phase Fluctuation ◽  
Surface Plastic Deformation ◽  
Surface Plastic ◽  
Stick Slip ◽  
And Performance ◽  
Smart Surface

Smart material surfaces/interfaces are playing important role in making hybrid nano particulate coated sensors and smart composite structures for applications in space, defense, infrastructure and biological system. The reliability and performance of these coatings on the smart surface depends upon the stability and life of their nano/micro-structures and interface properties. Atomic Force Microscopy is used extensively to study friction, wear and surface forces. In this paper a tool has been developed to have an insight of signals associated with friction and tribo-acoustics. This research aims to develop a combination of tools using High Speed Data Capture tools used in conjunction with the AFM to collect the frictional signal at the frequency of 500 kHz for 500 ms and phase fluctuation processor for study of friction signal. Friction signal from the AFM has poor information on the interfacial material properties like the stick-slip, plastic deformation of the contact surface. Clearer, information can be attained using the phase fluctuation based processor. This method provides friction signal and generation of the tribo-acoustics due to surface plastic deformation with excellent signal to noise ratio.

scholarly journals On the Design of a New Simulated Inductor Using a Contactless Electrical Tomography System as an Example

Sensors ◽  
2019 ◽  
Vol 19 (11) ◽  
pp. 2463 ◽  
Author(s):  
Xin Ye ◽  
Yuxin Wang ◽  
Xiao-Yu Tang ◽  
Haifeng Ji ◽  
Baoliang Wang ◽  
...  
Keyword(s):  
Signal To Noise Ratio ◽  
Research Work ◽  
Impedance Measurement ◽  
Power Source ◽  
Input Current ◽  
Output Current ◽  
Electrical Tomography ◽  
Tomography System ◽  
Coupling Capacitance ◽  
Measurement Results

This work reports a new simulated inductor which is suitable for a Contactless Electrical Tomography (CET) system and can effectively overcome the unfavorable influence of coupling capacitance on the measurement results. By detailed analysis and comparison, it is found that the grounded simulated inductor has a simple circuit construction but its output current is not equal to its input current, while the floating simulated inductor can be used as an independent inductor module but its circuit structure is relatively complex. A new simulated inductor is designed by compensating the currents from the common node of an introduced independent power source to the main circuit. The new simulated inductor combines the advantages of the grounded simulated inductor and the floating simulated inductor. It has the simple construction similar to that of the grounded simulated inductor and its input current is equal to the output current, which means it can be used as an independent module. The impedance measurement and practical image reconstruction experiments were carried out to verify the effectiveness of the new simulated inductor. The experimental results show that the design of the new simulated inductor is successful, and the performance of the impedance measurement is satisfactory. The signal-to-noise ratio of the CET system is improved. Meanwhile, the research work also indicates that in the case when the independent power source is not available, the new simulated inductor is also an effective alternative method. But the phase difference between input signal and output signal is approximately 90° when the elimination principle is realized.

scholarly journals Phase locked loop-based clock synthesizer for reconfigurable analog-to-digital converters

2021 ◽  
Author(s):  
Mateus B. Castro ◽  
Raphael R. N. Souza ◽  
Agord M. P. Junior ◽  
Eduardo R. Lima ◽  
Leandro T. Manera
Keyword(s):  
Supply Voltage ◽  
Signal To Noise Ratio ◽  
Phase Locked Loop ◽  
Analog To Digital Converters ◽  
Cmos Process ◽  
Reference Frequency ◽  
Process Technology ◽  
Worst Case ◽  
Sigma Delta ◽  
Analog To Digital

AbstractThis paper presents the complete design of a phase locked loop-based clock synthesizer for reconfigurable analog-to-digital converters. The synthesizer was implemented in TSMC 65 nm CMOS process technology and the presented results were obtained from extracted layout view with parasitics. The synthesizer generates clock frequencies ranging from 40 to 230 MHz considering a reference frequency of 10 MHz and a supply voltage of 1.2 V. Worst case current consumption is 634 $$\mu $$ μ W, settling time is 6 $$\mu $$ μ s, maximum jitter is 1.3 ns in a 0.037 mm$$^2$$ 2 area. Performance was validated in a test $$\Sigma \Delta $$ Σ Δ Modulator with bandwidths of 200 kHz, 500 kHz and 2 MHz, and oversampling frequencies of 40, 60 and 80 MHz respectively, with negligible signal-to-noise ratio degradation compared to an ideal clock.

Handwriting-Assistant

2021 ◽  
Vol 5 (4) ◽  
pp. 1-25
Author(s):  
Yanling Bu ◽  
Lei Xie ◽  
Yafeng Yin ◽  
Chuyu Wang ◽  
Jingyi Ning ◽  
...  
Keyword(s):  
Character Recognition ◽  
Tracking Error ◽  
Recognition Rate ◽  
Principal Component ◽  
Ground Truth ◽  
Touch Screen ◽  
Rigid Bodies ◽  
Measurement Unit ◽  
Smart Devices ◽  
Pure Rotation

Pen-based handwriting has become one of the major human-computer interaction methods. Traditional approaches either require writing on the specific supporting device like the touch screen, or limit the way of using the pen to pure rotation or translation. In this paper, we propose Handwriting-Assistant, to capture the free handwriting of ordinary pens on regular planes with mm-level accuracy. By attaching the inertial measurement unit (IMU) to the pen tail, we can infer the handwriting on the notebook, blackboard or other planes. Particularly, we build a generalized writing model to correlate the rotation and translation of IMU with the tip displacement comprehensively, thereby we can infer the tip trace accurately. Further, to display the effective handwriting during the continuous writing process, we leverage the principal component analysis (PCA) based method to detect the candidate writing plane, and then exploit the distance variation of each segment relative to the plane to distinguish on-plane strokes. Moreover, our solution can apply to other rigid bodies, enabling smart devices embedded with IMUs to act as handwriting tools. Experiment results show that our approach can capture the handwriting with high accuracy, e.g., the average tracking error is 1.84mm for letters with the size of about 2cmx1cm, and the average character recognition rate of recovered single letters achieves 98.2% accuracy of the ground-truth recorded by touch screen.

A High-Order Sigma-Delta Modulator Applied in Micro-Accelerometer

2014 ◽  
Vol 609-610 ◽  
pp. 1266-1270
Author(s):  
Jian Yang ◽  
Liang Liu ◽  
Qiu Ye Lv ◽  
Xiao Wei Liu ◽  
Liang Yin
Keyword(s):  
Noise Level ◽  
Signal To Noise Ratio ◽  
High Order ◽  
Signal Frequency ◽  
Cmos Process ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
Ideal Situation ◽  
Micro Accelerometer ◽  
The Ideal

In this paper a high-order sigma-delta modulator applied in micro-accelerometer is designed. The modulator chooses the distributed feedback structure. And the signal bandwidth is 500Hz, the oversampling ratio is 250 and sampling frequency is 250KHz. By the MATLAB Simulink simulation, when the input signal is 1g, and the signal frequency is 250Hz, the simulation result is that the noise level is-160dBV at the signal frequency in the ideal situation. And when considering the non-ideal factors, the simulation result shows that the noise level at the input accelerated signal is 20dBV higher than the ideal. The overall circuit was implemented under 0.5 um CMOS process and simulated in Cadence Spectre. The final simulation results show that the signal to noise ratio (SNR) is 97.1dB.

Sign in / Sign up

Export Citation Format

Share Document