scholarly journals Performance Enhancement of Pentacene-Based Organic Thin-Film Transistors Using a High-K PVA/Low-K PVP Bilayer as the Gate Insulator

Polymers ◽  
2021 ◽  
Vol 13 (22) ◽  
pp. 3941
Author(s):  
Ching-Lin Fan ◽  
Hou-Yen Tsao ◽  
Yu-Shien Shiah ◽  
Che-Wei Yao ◽  
Po-Wei Cheng
Keyword(s):  
Thin Film ◽  
Performance Enhancement ◽  
Gate Dielectric ◽  
Thin Film Transistor ◽  
Control Sample ◽  
Drain Current ◽  
Gate Insulator ◽  
Organic Thin Film ◽  
High K ◽  
Low K

In this study, we proposed using the high-K polyvinyl alcohol (PVA)/low-K poly-4-vinylphenol (PVP) bilayer structure as the gate insulator to improve the performance of a pentacene-based organic thin-film transistor. The dielectric constant of the optimal high-K PVA/low-K PVP bilayer was 5.6, which was higher than that of the single PVP layer. It resulted in an increase in the gate capacitance and an increased drain current. The surface morphology of the bilayer gate dielectric could be suitable for pentacene grain growth because the PVP layer was deposited above the organic PVA surface, thereby replacing the inorganic surface of the ITO gate electrode. The device performances were significantly improved by using the bilayer gate dielectric based upon the high-K characteristics of the PVA layer and the enlargement of the pentacene grain. Notably, the field-effect mobility was increased from 0.16 to 1.12 cm2/(Vs), 7 times higher than that of the control sample.

scholarly journals Effect of Novel Nanocomposite Materials for Enhancing Performance of Thin Film Transistor TFT Model

2016 ◽  
Vol 5 (1) ◽  
pp. 1
Author(s):  
Youssef Ahmed Mobarak ◽  
Moamen Atef
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Gate Dielectric ◽  
Low Cost ◽  
Thin Film Transistor ◽  
Analytical Models ◽  
Short Channel ◽  
High K ◽  
Wide Range ◽  
Low K

<span>The potential impact of high permittivity gate dielectrics on thin film transistors short channel and circuit performance has been studied using <a name="OLE_LINK110"></a><a name="OLE_LINK118"></a>highly accurate analytical models. In addition, the gate-to-channel capacitance and parasitic fringe capacitances have been extracted. The suggested model in this paper has been <a name="OLE_LINK37"></a><a name="OLE_LINK36"></a>increased the surface potential and decreased the <a name="OLE_LINK93"></a><a name="OLE_LINK92"></a>threshold voltage, whenever the conventional silicon dioxide gate dielectric<a name="OLE_LINK290"></a><a name="OLE_LINK280"></a> is replaced by high-K gate dielectric novel nanocomposite PVP/La<sub>2</sub>O<sub>3</sub>K<sub>ox</sub>=25. Also, it has been investigated that a decrease in parasitic outer fringe capacitance and gate-to-channel capacitance, whenever the conventional silicon nitride is replaced by low-K gate sidewall spacer dielectric novel nanocomposite PTFE/SiO<sub>2</sub>K<sub>sp</sub>=2.9. Finally, it has been demonstrated that using low-K gate sidewalls with high-K gate insulators can be decreased the gate fringing field and threshold voltage. In addition, fabrication of nanocomposites from polymers and nano-oxide particles found to have potential candidates for using it in a wide range of applications in low cost due to low process temperature of these nanocomposites materials.</span>

Fabrication of Organic Thin Film Transistors Using Low Temperature, Soluble Silicon Oxide as the Gate Dielectrics

2006 ◽  
Vol 965 ◽  
Author(s):  
Jeng-Hua Wei ◽  
HorngJiunn Lin ◽  
Ying-Ren Chen
Keyword(s):  
Thin Film ◽  
Silicon Oxide ◽  
Gate Dielectric ◽  
Gate Dielectrics ◽  
Thin Film Transistor ◽  
Gate Insulator ◽  
Breakdown Field ◽  
Organic Thin Film ◽  
Water Based ◽  
Low Threshold

ABSTRACTIn this paper, a unique water-based, liquid phase deposited silicon oxide (LPD SiO2) is adapted to the fabrication process of the organic thin film transistor (OTFT). Through the use of this process, an OTFT with a silicon oxide gate insulator is successfully fabricated at 100°C or less. At this low process temperature, the SiO2 functions efficiently as a gate dielectric with the breakdown field being larger than 5 MV/cm, the leakage current being near 1 pA/um2 with a gate bias of 20 V and the surface roughness being less than 1nm. Due to the high quality silicon oxide, the oxide-gated OTFT shows the low threshold voltage (-1 ∼ -2V) and medium on/off current ratio (∼1000). Because this oxide is a water-based process, it is highly resistant to the following soluble semiconductor material and its solvent.

scholarly journals Pentacene-Based Thin Film Transistor with Inkjet-Printed Nanocomposite High-K Dielectrics

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Chao-Te Liu ◽  
Wen-Hsi Lee ◽  
Jui-Feng Su
Keyword(s):  
Thin Film ◽  
Inkjet Printing ◽  
Gate Dielectric ◽  
Dielectric Film ◽  
Thin Film Transistor ◽  
Current Ratio ◽  
Large Current ◽  
High K ◽  
Dose Concentration ◽  
Top Contact

The nanocomposite gate insulating film of a pentacene-based thin film transistor was deposited by inkjet printing. In this study, utilizing the pearl miller to crumble the agglomerations and the dispersant to well stabilize the dispersion of nano-TiO2particles in the polymer matrix of the ink increases the dose concentration for pico-jetting, which could be as the gate dielectric film made by inkjet printing without the photography process. Finally, we realized top contact pentacene-TFTs and successfully accomplished the purpose of directly patternability and increase the performance of the device based on the nanocomposite by inkjet printing. These devices exhibited p-channel TFT characteristics with a high field-effect mobility (a saturation mobility of ̃0.58 cm2 V−1 s−1), a large current ratio (>103) and a low operation voltage (<6 V). Furthermore, we accorded the deposited mechanisms which caused the interface difference between of inkjet printing and spin coating. And we used XRD, SEM, Raman spectroscopy to help us analyze the transfer characteristics of pentacene films and the performance of OTFTs.

Low voltage operated, sol–gel derived oxide thin film transistor based on high-k Gd2O3 gate dielectric

2013 ◽  
Vol 138 (1) ◽  
pp. 1-4 ◽  
Author(s):  
Sungho Choi ◽  
Byung-Yoon Park ◽  
Sunho Jeong ◽  
Ji-Yoon Lee ◽  
Beyong-Hwan Ryu ◽  
...  
Keyword(s):  
Thin Film ◽  
Gate Dielectric ◽  
Low Voltage ◽  
Thin Film Transistor ◽  
Sol Gel ◽  
Oxide Thin Film ◽  
High K

Organic Thin Film Transistor Using a Photo-Curable Organic/Inorganic Hybrid Material as a Gate Dielectric

2008 ◽  
Vol 8 (9) ◽  
pp. 4561-4564 ◽  
Author(s):  
Do-Hoon Hwang ◽  
Yong Suk Yang ◽  
Jeong-Ik Lee ◽  
Seong Hyun Kim ◽  
Oun-Ho Park ◽  
...  
Keyword(s):  
Thin Film ◽  
Field Effect ◽  
Gate Dielectric ◽  
Thin Film Transistor ◽  
Dissipation Factor ◽  
Organic Thin Film ◽  
Organic Thin Film Transistor ◽  
Metal Insulator Metal ◽  
Oligomeric Silsesquioxane ◽  
Photo Acid Generator

A polyhedral oligomeric silsesquioxane derivative (POSS-OXT) containing photo-curable 4-membered cyclic oxetane functional groups was used as a gate dielectric of organic field effect transistor. The POSS-OXT was cross-linked and completely solidified by UV irradiation in the presence of a selected photo acid generator, and pinhole free uniform thin film was obtained. We fabricated a metal/insulator/metal device of Au/POSS-OXT (300 nm)/Au with area of 0.7 mm2 and the measured leakage current and capacitance of the device to evaluate the insulating properties of the POSS-OXT thin film. The maximum current was about 0.25 nA when 40 V was applied to the device. The observed values of the capacitance per unit area and dissipation factor were 11.4 nF/cm2 and 0.025, respectively. We fabricated an organic thin film transistor with pentacene as the active semiconductor and the photo-cross-linked POSS-OXT as an insulator. A field effect carrier mobility of 0.03 cm2/V·s was obtained with the device.

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