scholarly journals Solution for Mass Production of High-Throughput Digital Microfluidic Chip Based on a-Si TFT with In-Pixel Boost Circuit

Micromachines ◽  
2021 ◽  
Vol 12 (10) ◽  
pp. 1199
Author(s):  
Feng Qin ◽  
Kaidi Zhang ◽  
Baiquan Lin ◽  
Ping Su ◽  
Zhenyu Jia ◽  
...  
Keyword(s):  
Mass Production ◽  
Large Scale ◽  
Printed Circuit Board ◽  
Low Cost ◽  
Thin Film Transistor ◽  
Circuit Board ◽  
Driving Voltage ◽  
Lab On Chip ◽  
Electrowetting On Dielectric ◽  
Digital Microfluidic

As one of the most popular research hotspot of lab-on-chip, digital microfluidic (DMF) technology based on the principle of electrowetting has unique advantages of high-precision, low cost and programmable control. However, due to the limitation of electrodes number, the throughput is hard to further upgrade. Therefore, active matrix electrowetting-on-dielectric (AM-EWOD) technology is a solution to acquire larger scale of driving electrodes. However, the process of manufacturing of AM-EWOD based on thin-film-transistor (TFT) is complex and expensive. Besides, the driving voltage of DMF chip is usually much higher than that of common display products.In this paper, a solution for mass production of AM-EWOD based on amorphous silicon (a-Si) is provided. Samples of 32 × 32 matrix AM-EWOD chips was designed and manufactured. A boost circuit was integrated into the pixel, which can raise the pixel voltage up by about 50%. Customized designed Printed Circuit Board (PCB) was used to supply the timing signals and driving voltage to make the motion of droplets programmable. The process of moving, mixing and generation of droplets was demonstrated.The minimum voltage in need was about 20 V and a velocity of up to 96 mm/s was achieved. Such an DMF device with large-scale matrix and low driving voltage will be very suitable for POCT applications.

scholarly journals Reduction of time errors of the inertial measuring module by realization of its structural redundancy on the basis of three-axis micromechanical measuring instruments

2020 ◽  
pp. 66-80
Author(s):  
Mykola Chernyak ◽  
Vadym Kolesnyk
Keyword(s):  
Large Scale ◽  
Printed Circuit Board ◽  
Fault Tolerant ◽  
Low Cost ◽  
Circuit Board ◽  
Mutual Orientation ◽  
Measuring Instruments ◽  
Navigation Systems ◽  
Rotary Platform ◽  
Block Based

Redundant inertial measurement units (IMU) are used in security-critical operations since the advent of inertial technology. This approach allows you to create fault-tolerant systems that can detect and isolate defective sensors. Besides, experimental results have shown that redundant IMU is also an effective way to improve the performance of navigation systems. The question is only in the dependence of the accuracy of the unit on the number of sensors used and their mutual orientation. This paper analyses the influence of spatial orientation on the accuracy of an IMU with a redundant configuration in the case of using triaxial orthogonal micromechanical measuring modules as atomic structural units. The first part of this article concentrates on the geometry of the redundant IMU. Analysis of its metrological model of a redundant showed that, when dealing with orthogonal IMU triads, its resulting accuracy is independent of the relative orientation between them. This fact presents important practical implications since it demonstrates that using complex large-scale installation structures can be avoided. As a result, it is enough to place instead of an array of units, for example, only on one printed circuit board with any orientation. Also, it was found the relationship between the number of sensors employed and the accuracy improvement that enables us to ascertain the exact number of sensors needed to design a navigation system with a certain precision. The second part of this article shows the experimental approval of theoretical conclusions during the testing of a prototype block based on three low-cost units (MPU6050) built according to a symmetric tetrahedron scheme. The accuracy of the redundant block was experimentally evaluated based on the value of the errors in determining the modulus of gravity acceleration and a given angular velocity of a test rotary platform in a series of positions. The performance of the tested inertial measuring block was better on average in comparison with anyone module from this block that proved the possibility of using these approaches for MEMS sensors in high-accuracy application areas.

Packaging Technology for MEMS

2000 ◽  
Author(s):  
Qing Tan
Keyword(s):  
Large Scale ◽  
Printed Circuit Board ◽  
Low Cost ◽  
Circuit Board ◽  
Mems Devices ◽  
Green Tape ◽  
Mems Fabrication ◽  
Plastic Materials ◽  
Reaction Chambers ◽  
Board Process

Abstract A review is given for MEMS devices fabricated using packaging materials. From reported literatures and patents, a variety of ceramic and plastic materials have been used for many microdevices. The green tape process for ceramic, flexible circuit and printed circuit board process platforms are all found to be suitable for 3-D, complex MEMS devices. In addition, micromolding and laser machining are reported for plastic materials. Devices fabricated from those materials include micromotors, sensors, biomedical chips, fuel cells, microchemical reaction chambers, micromirrors, microlens systems, etc. The introduction of packaging material into MEMS fabrication bridged the gap for devices that are 3-D, meso or large scale, have relatively large force and are low cost.

EWOD-Based Digital Microfluidic Chip and its Application

2012 ◽  
Vol 157-158 ◽  
pp. 1071-1074 ◽  
Author(s):  
Yin Xia Chang ◽  
Si Xiang Zhang ◽  
Jian Yi Li
Keyword(s):  
Microfluidic Chip ◽  
Printed Circuit Board ◽  
New Technologies ◽  
New Technology ◽  
Circuit Board ◽  
Commercial Application ◽  
Good Prospect ◽  
Electrowetting On Dielectric ◽  
Major Application ◽  
Digital Microfluidic

As a new technology, digital microfluidic chip based on EWOD (Electrowetting on Dielectric) has good prospect of application in biological, medical, chemical and optic fields. Firstly, the working principle is introduced. Then the major application domains are summarized. Finally, the key problems in design and two fabrication methods are discussed, the clean-room-processing chip is more precise and PCB(Printed Circuit Board) chip is cheaper. New technologies developed in these fields speed up the step from lab to commercial application.

A Novel Wideband transition from Substrate Integrated Waveguide to Rectangular Waveguide

2020 ◽  
Vol 10 ◽  
Author(s):  
Keyur Mahant ◽  
Hiren Mewada ◽  
Amit Patel ◽  
Alpesh Vala ◽  
Jitendra Chaudhari
Keyword(s):  
Rectangular Waveguide ◽  
Printed Circuit Board ◽  
Low Cost ◽  
Single Layer ◽  
Circuit Board ◽  
Substrate Integrated Waveguide ◽  
Ka Band ◽  
Better Than ◽  
Millimeter Wave Circuits ◽  
Wideband Transition

Aim: In this article, wideband substrate integrated waveguide (SIW) and rectangular waveguide (RWG) transition operating in Ka-band is proposed Objective: In this article, wideband substrate integrated waveguide (SIW) and rectangular waveguide (RWG) transition operating in Ka-band is proposed. Method: Coupling patch etched on the SIW cavity to couple the electromagnetic energy from SIW to RWG. Moreover, metasurface is introduced into the radiating patch to enhance bandwidth. To verify the functionality of the proposed structure back to back transition is designed and fabricated on a single layer substrate using standard printed circuit board (PCB) fabrication technology. Results: Measured results matches with the simulation results, measured insertion loss is less than 1.2 dB and return loss is better than 3 dB for the frequency range of 28.8 to 36.3 GHz. By fabricating transition with 35 SRRs bandwidth of the proposed transition can be improved. Conclusion: The proposed transition has advantages like compact in size, easy to fabricate, low cost and wide bandwidth. Proposed structure is a good candidate for millimeter wave circuits and systems.

scholarly journals Highly Compact Through-Wire Microstrip to Empty Substrate Integrated Coaxial Line Transition

2021 ◽  
Vol 11 (15) ◽  
pp. 6885
Author(s):  
Marcos D. Fernandez ◽  
José A. Ballesteros ◽  
Angel Belenguer
Keyword(s):  
Printed Circuit Board ◽  
Low Cost ◽  
Coaxial Line ◽  
Circuit Board ◽  
Central Layer ◽  
Printed Circuit ◽  
Integrated Technology ◽  
Low Profile ◽  
The Many ◽  
High Degree

Empty substrate integrated coaxial line (ESICL) technology preserves the many advantages of the substrate integrated technology waveguides, such as low cost, low profile, or integration in a printed circuit board (PCB); in addition, ESICL is non-dispersive and has low radiation. To date, only two transitions have been proposed in the literature that connect the ESICL to classical planar lines such as grounded coplanar and microstrip. In both transitions, the feeding planar lines and the ESICL are built in the same substrate layer and they are based on transformed structures in the planar line, which must be in the central layer of the ESICL. These transitions also combine a lot of metallized and non-metallized parts, which increases the complexity of the manufacturing process. In this work, a new through-wire microstrip-to-ESICL transition is proposed. The feeding lines and the ESICL are implemented in different layers, so that the height of the ESICL can be independently chosen. In addition, it is a highly compact transition that does not require a transformer and can be freely rotated in its plane. This simplicity provides a high degree of versatility in the design phase, where there are only four variables that control the performance of the transition.

scholarly journals Performance Improvement of ZnSnO Thin-Film Transistors with Low-Temperature Self-Combustion Reaction

Electronics ◽  
2021 ◽  
Vol 10 (9) ◽  
pp. 1099
Author(s):  
Ye-Ji Han ◽  
Se Hyeong Lee ◽  
So-Young Bak ◽  
Tae-Hee Han ◽  
Sangwoo Kim ◽  
...  
Keyword(s):  
Thin Film ◽  
Photoelectron Spectroscopy ◽  
Large Scale ◽  
Low Cost ◽  
Thermal Analyses ◽  
Thin Film Transistor ◽  
Sol Gel ◽  
Annealing Temperatures ◽  
Zinc Tin Oxide ◽  
Thermal Limitation

Conventional sol-gel solutions have received significant attention in thin-film transistor (TFT) manufacturing because of their advantages such as simple processing, large-scale applicability, and low cost. However, conventional sol-gel processed zinc tin oxide (ZTO) TFTs have a thermal limitation in that they require high annealing temperatures of more than 500 °C, which are incompatible with most flexible plastic substrates. In this study, to overcome the thermal limitation of conventional sol-gel processed ZTO TFTs, we demonstrated a ZTO TFT that was fabricated at low annealing temperatures of 350 °C using self-combustion. The optimized device exhibited satisfactory performance, with μsat of 4.72 cm2/V∙s, Vth of −1.28 V, SS of 0.86 V/decade, and ION/OFF of 1.70 × 106 at a low annealing temperature of 350 °C for one hour. To compare a conventional sol-gel processed ZTO TFT with the optimized device, thermogravimetric and differential thermal analyses (TG-DTA) and X-ray photoelectron spectroscopy (XPS) were implemented.

EFFECT OF HYDROTHERMAL TIME ON THE GROWTH OF ZnO NANORODS

2020 ◽  
pp. 84-91
Author(s):  
Hanh
Keyword(s):  
Printed Circuit Board ◽  
Low Cost ◽  
Cell Structure ◽  
Zno Nanorods ◽  
Zinc Nitrate ◽  
Circuit Board ◽  
Nitrate Hexahydrate ◽  
Hydrothermal Time ◽  
One Step ◽  
Surface Morphologies

In this work, ZnO nanorods (NRs) were successfully grown on printed circuit board substrates (PCBs) by utilizing a one-step, seedless, low-cost hydrothermal method. It was shown that by implementing a galvanic cell structure in an aqueous solution of 80 mM of zinc nitrate hexahydrate and hexamethylenetetramine, ZnO NRs can directly grow on the PCBs substrate without the assistance of a seed layer. The effect of hydrothermal time on the surface morphologies, and the crystallinity of the as-grown ZnO nanorods (NRs) was also investigated. The as-grown ZnO NRs also exhibited a significant enhancement in vertical growth and their crystallinity with 5 hour growth.

Nonlinear-Time-Dependent Analysis of Micro Via-In-Pad Substrates for Solder Bumped Flip Chip Applications

2002 ◽  
Vol 124 (3) ◽  
pp. 205-211 ◽  
Author(s):  
John H. Lau ◽  
S. W. Ricky Lee ◽  
Stephen H. Pan ◽  
Chris Chang
Keyword(s):  
Cross Sections ◽  
Flip Chip ◽  
Printed Circuit Board ◽  
Low Cost ◽  
Circuit Board ◽  
Test Results ◽  
Pcb Assembly ◽  
Creep Analysis ◽  
Chip Scale Package ◽  
Time Dependent Analysis

An elasto-plastic-creep analysis of a low-cost micro via-in-pad (VIP) substrate for supporting a solder bumped flip chip in a chip scale package (CSP) format which is soldered onto a printed circuit board (PCB) is presented in this study. Emphasis is placed on the design, materials, and reliability of the micro VIP substrate and of the micro VIP CSP solder joints on PCB. The solder is assumed to obey Norton’s creep law. Cross-sections of samples are examined for a better understanding of the solder bump, CSP substrate redistribution, micro VIP, and solder joint. Also, the thermal cycling test results of the micro VIP CSP PCB assembly is presented.

scholarly journals Process Design Kit and Design Automation for Flexible Hybrid Electronics

2019 ◽  
Vol 16 (3) ◽  
pp. 117-123
Author(s):  
Tsung-Ching Huang ◽  
Ting Lei ◽  
Leilai Shao ◽  
Sridhar Sivapurapu ◽  
Madhavan Swaminathan ◽  
...  
Keyword(s):  
Process Design ◽  
Design Automation ◽  
High Performance ◽  
Large Scale ◽  
Low Cost ◽  
Thin Film Transistor ◽  
Solution Process ◽  
Oxide Semiconductor ◽  
Wearable Electronics ◽  
Wide Range

Abstract High-performance low-cost flexible hybrid electronics (FHE) are desirable for applications such as internet of things and wearable electronics. Carbon nanotube (CNT) thin-film transistor (TFT) is a promising candidate for high-performance FHE because of its high carrier mobility, superior mechanical flexibility, and material compatibility with low-cost printing and solution processes. Flexible sensors and peripheral CNT-TFT circuits, such as decoders, drivers, and sense amplifiers, can be printed and hybrid-integrated with thinned (<50 μm) silicon chips on soft, thin, and flexible substrates for a wide range of applications, from flexible displays to wearable medical devices. Here, we report (1) a process design kit (PDK) to enable FHE design automation for large-scale FHE circuits and (2) solution process-proven intellectual property blocks for TFT circuits design, including Pseudo-Complementary Metal-Oxide-Semiconductor (Pseudo-CMOS) flexible digital logic and analog amplifiers. The FHE-PDK is fully compatible with popular silicon design tools for design and simulation of hybrid-integrated flexible circuits.

Sign in / Sign up

Export Citation Format

Share Document