scholarly journals The Effect of Epoxy Polymer Addition in Sn-Ag-Cu and Sn-Bi Solder Joints

Materials ◽  
2019 ◽  
Vol 12 (6) ◽  
pp. 960 ◽  
Author(s):  
Min-Soo Kang ◽  
Do-Seok Kim ◽  
Young-Eui Shin

To analyze the reinforcement effect of adding polymer to solder paste, epoxies were mixed with two currently available Sn-3.0Ag-0.5Cu (wt.% SAC305) and Sn-59Bi (wt.%) solder pastes and specimens prepared by bonding chip resistors to a printed circuit board. The effect of repetitive thermal stress on the solder joints was then analyzed experimentally using thermal shock testing (−40 °C to 125 °C) over 2000 cycles. The viscoplastic stress–strain curves generated in the solder were simulated using finite element analysis, and the hysteresis loop was calculated. The growth and propagation of cracks in the solder were also predicted using strain energy formulas. It was confirmed that the epoxy paste dispersed the stress inside the solder joint by externally supporting the solder fillet, and crack formation was suppressed, improving the lifetime of the solder joint.

2010 ◽  
Vol 7 (1) ◽  
pp. 13-30 ◽  
Author(s):  
Zhou Zeng ◽  
Zhuang Li ◽  
Zuoyong Zheng

This paper investigates methodologies for locating and identifying the components on a printed circuit board (PCB) used for surface mount device inspection. The proposed scheme consists of two stages: solder joint extraction and protective coating extraction. Solder joints are extracted by first detecting all the highlight areas, and then recognizing and removing the invalid highlight areas which are mainly markings and via-holes. We sum up three color distribution features. And the invalid highlight areas are recognized and removed by comparing the features of the target objects and the reference objects. The sequence of color distribution as a new clue has been applied to clustering solder joints. Each protective coating is extracted by the positions of the clustered solder joints. Experimental results show that the proposed method can extract most of components effectively.


2011 ◽  
Vol 133 (2) ◽  
Author(s):  
Hung-Jen Chang ◽  
Jung-Hua Chou ◽  
Tao-Chih Chang ◽  
Chau-Jie Zhan ◽  
Min-Hsiung Hon ◽  
...  

Five halogen-free (HF) dummy plastic ball grid array (PBGA) components with daisy-chains and Sn4.0Ag0.5Cu (SAC405) Pb-free solder balls were assembled on a HF high density interconnection (HDI) printed circuit board (PCB) using Sn1.0Ag0.5Cu (SAC105) and Sn3.0Ag0.5Cu (SAC305) Pb-free solder pastes, respectively. The above compositions were in weight percent. The assemblies were then experienced to moisture sensitive level testing with three times reflow at a peak temperature of 260 °C; no delamination was found present in both the component and PCB laminates. The microstructure showed that the utilization of SAC105 solder paste was beneficial in refining the Ag3Sn intermetallic compound (IMC) within the solder joint and the intermetallic layers formed at various interfaces with different Ni contents and thicknesses due to different metal finishes. The IMC spalling was found at the BGA-side interface within the solder joints formed with SAC105 solder paste but not discovered within the ones made of SAC305 solder paste. The pull strength of the solder joint formed with SAC305 solder paste was always higher than that made from SAC105 no matter on Cu or electroless Ni. Moreover, the fracture was found at the interface between the Cu foil and epoxy in the halogen-free test device. Numerical analysis showed that the thickness of IMC layer dominated the pull strength of the solder joint because the Z-axial normal stress applied to the solder joints formed with Cu and electroless Ni were 752.0 and 816.6 MPa, respectively, and a thicker IMC layer was beneficial to provide a higher pull strength of solder joint.


Author(s):  
Norman J. Armendariz ◽  
Prawin Paulraj

Abstract The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.


2012 ◽  
Vol 134 (4) ◽  
Author(s):  
D. N. Borza ◽  
I. T. Nistea

Reliability of electronic assemblies at board level and solder joint integrity depend upon the stress applied to the assembly. The stress is often of thermomechanical or of vibrational nature. In both cases, the behavior of the assembly is strongly influenced by the mechanical boundary conditions created by the printed circuit board (PCB) to casing fasteners. In many previously published papers, the conditions imposed to the fasteners are mostly aiming at an increase of the fundamental frequency and a decrease of static or dynamic displacement values characterizing the deformation. These conditions aim at reducing the fatigue in different parts of these assemblies. In the photomechanics laboratory of INSA Rouen, the origins of solder joint failure have been investigated by means of full-field measurements of the flexure deformation induced by vibrations or by forced thermal convection. The measurements were done both at a global level for the whole printed circuit board assembly (PCBA) and at a local level at the solder joints where failure was reported. The experimental technique used was phase-stepped laser speckle interferometry. This technique has a submicrometer sensitivity with respect to out-of-plane deformations induced by bending and its use is completely nonintrusive. Some of the results were comforted by comparison with a numerical finite elements model. The experimental results are presented either as time-average holographic fringe patterns, as in the case of vibrations, or as wrapped phase patterns, as in the case of deformation under thermomechanical stress. Both types of fringe patterns may be processed so as to obtain the explicit out-of-plane static deformation (or vibration amplitude) maps. Experimental results show that the direct cause of solder joint failure may be a high local PCB curvature produced by a supplementary fastening screw intended to reduce displacements and increase fundamental frequency. The curvature is directly responsible for tensile stress appearing in the leads of a large quad flat pack (QFP) component and for shear in the corresponding solder joints. The general principle of increasing the fundamental frequency and decreasing the static or dynamic displacement values has to be checked against the consequences on the PCB curvature near large electronic devices having high stiffness.


2011 ◽  
Vol 423 ◽  
pp. 26-30
Author(s):  
S. Assif ◽  
M. Agouzoul ◽  
A. El Hami ◽  
O. Bendaou ◽  
Y. Gbati

Increasing demand for smaller consumer electronic devices with multi-function capabilities has driven the packaging architectures trends for the finer-pitch interconnects, thus increasing chances of their failures. A simulation of the Board Level Drop-Test according to JEDEC (Joint Electron Device Council) is performed to evaluate the solder joint reliability under drop impact test. After good insights to the physics of the problem, the results of the numerical analysis on a simple Euler-Bernoulli beam were validated against analytical analysis. Since the simulation has to be performed on ANSYS Mechanical which is an implicit software, two methods were proposed, the acceleration-input and the displacement-input. The results are the same for both methods. Therefore, the simulation is carried on the real standard model construction of the board package level2. Then a new improved model is proposed to satisfy shape regular element and accuracy. All the models are validated to show excellent first level correlation on the dynamic responses of Printed Circuit Board, and second level correlation on solder joint stress. Then a static model useful for quick design analysis and optimization’s works is proposed and validated. Finally, plasticity behavior is introduced on the solder ball and a non-linear analysis is performed.


2013 ◽  
Vol 479-480 ◽  
pp. 524-529
Author(s):  
C.T. Pan ◽  
F.T. Hsu ◽  
C.C. Nien ◽  
Z.H. Liu ◽  
Y.J. Chen ◽  
...  

Small and efficient energy harvesters, as a renewable power supply, draw lots of attention in the last few years. This paper presents a planar rotary electromagnetic generator with copper coils fabricated by using printed circuit board (PCB) as inductance and Nd-Fe-B magnets as magnetic element. Coils are fabricated on PCB, which is presumably cost-effective and promising methods. 28-pole Nd-Fe-B magnets with outer diameter of 50 mm and thickness of 2 mm was sintered and magnetized, which can provide magnetic field of 1.44 Tesla. This harvester consists of planar multilayer with multi-pole coils and multi-pole permanent magnet, and the volume of this harvester is about 50x50x2.5 mm3. Finite element analysis is used to design energy harvesting system, and simulation model of the energy harvester is established. In order to verify the simulation, experiment data are compared with simulation result. The PCB energy harvester prototype can generate induced voltage 0.61 V and 13.29mW output power at rotary speed of 4,000 rpm.


Sign in / Sign up

Export Citation Format

Share Document