scholarly journals Improving the Characteristics of Multi-Level LUT-Based Mealy FSMs

Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1859
Author(s):  
Alexander Barkalov ◽  
Larysa Titarenko ◽  
Kazimierz Krzywicki ◽  
Svetlana Saburova

Contemporary digital systems include many varying sequential blocks. In the article, we discuss a case when Mealy finite state machines (FSMs) describe the behavior of sequential blocks. In many cases, the performance is the most important characteristic of an FSM circuit. In the article, we propose a method which allows increasing the operating frequency of multi-level look-up table (LUT)-based Mealy FSMs. The main idea of the proposed approach is to use together two methods of structural decomposition. They are: (1) the known method of transformation of codes of collections of outputs into FSM state codes and (2) a new method of extension of state codes. The proposed approach allows producing FPGA-based FSMs having three levels of logic combined through the system of regular interconnections. Each function for every level of logic was implemented using a single LUT. An example of the synthesis of Mealy FSM with the proposed architecture is shown. The effectiveness of the proposed method was confirmed by the results of experimental studies based on standard benchmark FSMs. The research results show that FSM circuits based on the proposed approach have a higher operating frequency than can be obtained using other investigated methods. The maximum operating frequency is improved by an average of 3.18 to 12.57 percent. These improvements are accompanied by a small growth of LUT count.

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 901
Author(s):  
Alexander Barkalov ◽  
Larysa Titarenko ◽  
Kazimierz Krzywicki ◽  
Svetlana Saburova

Practically, any digital system includes sequential blocks. This article is devoted to a case when sequential blocks are represented by models of Mealy finite state machines (FSMs). The performance (maximum operating frequency) is one of the most important characteristics of an FSM circuit. In this article, a method is proposed which aims at increasing the operating frequency of LUT-based Mealy FSMs with twofold state assignment. This is done using only extended state codes. Such an approach allows excluding a block of transformation of binary state codes into extended state codes. The proposed approach leads to LUT-based Mealy FSM circuits having two levels of logic blocks. Each function for any logic level is represented by a circuit including a single LUT. The proposed method is illustrated by an example of synthesis. The results of experiments conducted with standard benchmarks show that the proposed approach produces LUT-based circuits with significantly higher operating frequency than it is for circuits produced by other investigated methods (Auto and One-hot of Vivado, JEDI, twofold state assignment). The performance is increased by an average of 15.9 to 25.49 percent. These improvements are accompanied by a small growth of the numbers of LUTs compared with circuits based on twofold state assignment. Our approach provides the best area-time products compared with other investigated methods. The advantages of the proposed approach increase as the number of FSM inputs and states increases.


VLSI Design ◽  
1994 ◽  
Vol 2 (2) ◽  
pp. 105-116
Author(s):  
S. Muddappa ◽  
R. Z. Makki ◽  
Z. Michalewicz ◽  
S. Isukapalli

In this paper we present a new tool for the encoding of multi-level finite state machines based on the concept of evolution programming. Evolution programs are stochastic adaptive algorithms, based on the paradigm of genetic algorithms whose search methods model some natural phenomenon: genetic inheritance and Darwinian strife for survival. Crossover and mutation rates were tailored to the state assignment problem experimentally. We present results over a wide range of MCNC benchmarks which demonstrate the effectiveness of the new tool. The results show that evolution programs can be effectively applied to state assignment.


Author(s):  
Robert Czerwiński ◽  
Dariusz Kania

Synthesis of finite state machines for CPLDsThe paper presents a new two-step approach to FSM synthesis for PAL-based CPLDs that strives to find an optimum fit of an FSM to the structure of the CPLD. The first step, the original state assignment method, includes techniques of two-level minimization and aims at area minimization. The second step, PAL-oriented multi-level optimization, is a search for implicants that can be shared by several functions. It is based on the graph of outputs. Results of experiments prove that the presented approach is especially effective for PAL-based CPLD structures containing a low number of product terms.


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