scholarly journals A Compact Size Wideband RF-VGA Based on Second Generation Controlled Current Conveyors

Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1600
Author(s):  
J. del Pino ◽  
Sunil L. Khemchandani ◽  
D. Galante-Sempere ◽  
C. Luján-Martínez
Keyword(s):  
Power Consumption ◽  
Second Generation ◽  
Low Cost ◽  
Low Frequency ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Current Conveyors ◽  
Compact Size ◽  
Sige Bicmos ◽  
Controlled Current Conveyors

This paper presents a methodology to design a wideband radio frequency variable gain amplifier (RF-VGA) in a low-cost SiGe BiCMOS 0.35 μm process. The circuit uses two Class A amplifiers based on second-generation controlled current conveyors (CCCII). The main feature of this circuit is the wideband input match along with a reduced NF (5.5–9.6 dB) and, to the authors’ knowledge, the lowest die footprint reported (62 × 44 μm2 area). The implementation of the RF-VGA based on CCCII allows a wideband input match without the need of passive elements. Due to the nature of the circuit, when the gain is increased, the power consumption is reduced. The architecture is suitable for designing wideband, low-power, and low-noise amplifiers. The proposed design achieves a tunable gain of 6.7–18 dB and a power consumption of 1.7 mA with a ±1.5 V DC supply. At maximum gain, the proposed RF-VGA covers from DC up to 1 GHz and can find application in software design radios (SDRs), the low frequency medical implant communication system (MICS) or industrial, scientific, and medical (ISM) bands.

Low Frequency Piezoelectric Synthetic Jets

2010 ◽  
Author(s):  
Charles E. Seeley ◽  
Mehmet Arik ◽  
Yogen Uttukar ◽  
Tunc Icoz
Keyword(s):  
Low Cost ◽  
Heated Surface ◽  
Fluid Structure Interaction ◽  
Low Frequency ◽  
Synthetic Jet ◽  
Synthetic Jets ◽  
Fluid Structure ◽  
Structure Interaction ◽  
Active Cooling ◽  
Compact Size

Active cooling is often required for circuit boards with high heat generation densities. Synthetic jets driven with piezoelectric actuators offer interesting capabilities for localized active cooling of electronics due to their compact size, low cost and substantial cooling effectiveness. The design of synthetic jets for specific applications requires practical design tools that capture the strong fluid structure interaction without long run times. There is particular interest in synthetic jets that have a low operating frequency to reduce noise levels. This paper describes how common finite element (FE) and computational fluid dynamics (CFD) codes can be used to calculate parameters for a synthetic jet fluid structure interaction (FSI) model that only requires a limited number of degrees of freedom and is solved using a direct approach for low frequency synthetic jets. Tests are performed based on impinging on a heated surface to measure heat transfer enhancement. The test results are compared to the FSI model results for validation and agreement is found to be good in the frequency range of interest from 200 to 500 Hz.

METAMORPHIC LOW NOISE AMPLIFIERS AND OPTICAL COMPONENTS

2003 ◽  
Vol 13 (01) ◽  
pp. 65-89 ◽  
Author(s):  
C. S. WHELAN ◽  
P. F. MARSH ◽  
R. E. LEONI ◽  
W. E. HOKE ◽  
S. M. LARDIZABAL ◽  
...  
Keyword(s):  
Low Cost ◽  
Indium Content ◽  
Low Noise ◽  
Superior Performance ◽  
Low Noise Amplifiers ◽  
Time To Failure ◽  
Active Device ◽  
Lattice Matching ◽  
High Indium Content ◽  
The Cost

GaAs based metamorphic HEMT (MHEMT) technology has emerged as an attractive, low cost alternative to InP HEMTs. The strain-induced imperfections caused by high indium content layers on GaAs is eliminated in metamorphic devices by providing a properly grown lattice-matching buffer between the substrate and active device layers. With this limitation overcome, it is now possible to provide the superior performance of InP-based devices with the cost advantages of highly manufacturable 4- and 6-inch GaAs wafers that can easily be integrated on existing GaAs fabrication lines. This paper will review device performance as well as state-of-the-art low noise amplifiers fabricated with this technology operating from 1 to 100 GHz. Fiber optic receiver components such as 40 Gb/s optical-to-electrical photodiodes and traveling wave amplifiers fabricated metamorphically will also be discussed. Finally, device and circuit reliability data will be presented demonstrating median-time-to-failure of more than 30 years at 125 C.

Design of ECG Signal Acquisition and Processing Circult

2012 ◽  
Vol 236-237 ◽  
pp. 856-861 ◽  
Author(s):  
Jing Ma ◽  
Jun Xu ◽  
Hai Bo Xu ◽  
Yu Wang ◽  
Sheng Xu Yin
Keyword(s):  
Signal To Noise Ratio ◽  
Low Cost ◽  
Low Frequency ◽  
Low Noise ◽  
Cardiac Conduction ◽  
Signal Acquisition ◽  
Ecg Signal ◽  
Physiological Signal ◽  
Heart Study ◽  
Low Pass

ECG signal is, as a vital method performed on the heart study and clinical diagnosis of cardiovascular diseases, an important human physiological signal, containing the human cardiac conduction system of physiological and pathological information. Aiming at the weak low frequency characteristic of ECG signals, the core circuit based on the AD620 and LM324 amplifier is given. After analyzing the major components of the ECG signal and the frequency range of interference, weak ECG signal collected by the electrodes is amplified by the preamplifier circuit, and the interference then is wiped out by using a low-pass filer, a high-pass filer, 50Hz notch filer and back amplifier circuit, finally a right wave of ECG is received. The characteristics of the system features the merits of high input impedance, high CMRR, low noise, less excursion and high SNR(signal to noise ratio), low cost and so on.

MULTI-STANDARD RECEIVER BASEBAND CHAIN USING DIGITALLY PROGRAMMABLE OTA BASED ON CCII AND CURRENT DIVISION NETWORKS

2013 ◽  
Vol 22 (04) ◽  
pp. 1350019 ◽  
Author(s):  
SOLIMAN A. MAHMOUD ◽  
EMAN A. SOLIMAN
Keyword(s):  
Power Consumption ◽  
Fourth Order ◽  
Second Generation ◽  
Cmos Technology ◽  
Current Conveyors ◽  
Baseband Receiver ◽  
Digitally Programmable ◽  
Dc Gain ◽  
Programmable Gain ◽  
Better Than

In this paper, a digitally programmable OTA-based multi-standard receiver baseband chain is presented. The multi-standard receiver baseband chain consists of two programmable gain amplifiers (PGA1 and PGA2) and a fourth-order LPF. The receiver is suitable for Bluetooth/UMTS/DVB-H/WLAN standards. Three different programmable OTA architectures based on second generation current conveyors (CCIIs) and Current Division Networks (CDNs) are discussed. The programmable OTA with the lowest power consumption, moderate area and good linearity — better than -50 dB HD3 — is selected to realize the multi-standard baseband receiver chain. The power consumption of the receiver chain is 6 mW. The DC gain varies over a 68 dB range with 1 MHz to 13.6 MHz programmable bandwidth. The receiver baseband chain is realized using 90 nm CMOS technology model under ±0.5 V voltage supply.

scholarly journals Design of a very low-power, low-cost 60 GHz receiver front-end implemented in 65 nm CMOS technology

2011 ◽  
Vol 3 (2) ◽  
pp. 131-138 ◽  
Author(s):  
Michael Kraemer ◽  
Daniela Dragomirescu ◽  
Robert Plana
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Noise Figure ◽  
Low Cost ◽  
Cmos Technology ◽  
Low Noise ◽  
Oxide Semiconductor ◽  
Voltage Controlled Oscillator ◽  
60 Ghz ◽  
Front End

The research on the design of receiver front-ends for very high data-rate communication in the 60 GHz band in nanoscale Complementary Metal Oxide Semiconductor (CMOS) technologies is going on for some time now. Although a multitude of 60 GHz front-ends have been published in recent years, they are not consequently optimized for low power consumption. Thus, these front-ends dissipate too much power for battery-powered applications like handheld devices, mobile phones, and wireless sensor networks. This article describes the design of a direct conversion receiver front-end that addresses the issue of power consumption, while at the same time permitting low cost (due to area minimization by the use of spiral inductors). It is implemented in a 65 nm CMOS technology. The realized front-end achieves a record power consumption of only 43 mW including low-noise amplifier (LNA), mixer, a voltage controlled oscillator (VCO), a local oscillator (LO) buffer, and a baseband buffer (without this latter buffer the power consumption is even lower, only 29 mW). Its pad-limited size is 0.55 × 1 mm2. At the same time, the front-end achieves state-of-the-art performance with respect to its other properties: Its maximum measured power conversion gain is 30 dB, the RF and IF bandwidths are 56.5–61.5 and 0–1.5 GHz, respectively, its measured minimum noise figure is 9.2 dB, and its measured IP−1 dB is −36 dBm.

scholarly journals Study of Linearity and Power Consumption Requirements of CMOS Low Noise Amplifiers in Context of LTE Systems and Beyond

2014 ◽  
Vol 2014 ◽  
pp. 1-11 ◽  
Author(s):  
Grzegorz Szczepkowski ◽  
Ronan Farrell
Keyword(s):  
Power Consumption ◽  
Antenna Arrays ◽  
Noise Figure ◽  
Low Noise ◽  
Base Stations ◽  
Small Cells ◽  
Handheld Devices ◽  
Low Noise Amplifiers ◽  
Budget Planning

This paper presents a study of linearity in wideband CMOS low noise amplifiers (LNA) and its relationship to power consumption in context of Long Term Evolution (LTE) systems and its future developments. Using proposed figure of merit (FoM) to compare 35 state-of-the-art LNA circuits published over the last decade, the paper explores a dependence between amplifier performance (i.e., combined linearity, noise figure, and gain) and power consumption. In order to satisfy stringent linearity specifications for LTE standard (and its likely successors), the paper predicts that LNA FoM increase in the range of +0.2 dB/mW is expected and will inevitably translate into a significant increase in power consumption—a critical budget planning aspect for handheld devices, active antenna arrays, and base stations operating in small cells.

Low-frequency noise correlations in lateral pnp bipolar transistors

1992 ◽  
Vol 70 (10-11) ◽  
pp. 1112-1117
Author(s):  
A. Nathan ◽  
E. Charbon ◽  
W. Kung ◽  
A. Salim
Keyword(s):  
Integrated Circuit ◽  
Low Frequency ◽  
Intrinsic Noise ◽  
Low Noise ◽  
Bipolar Transistors ◽  
Current Gain ◽  
Low Noise Amplifiers ◽  
Frequency Noise ◽  
Low Frequency Noise ◽  
Low Frequencies

Measurement results of low-frequency noise behaviour, and in particular, the noise correlations in lateral pnp bipolar transistors are presented for various bias conditions in both forward active and saturation regimes. The correlation in output collector noise is very high with a value close to unity only when the device is in medium injection. At extremely high injection, the degree of coherence degrades, depicting a behaviour similar to the forward current gain of the device. This degradation can be attributed to emitter-crowding effects. The correlation in output noise can be exploited to drastically suppress the intrinsic noise, particularly at low frequencies, making such devices useful for the input stage of amplifiers; the first step towards realisation of ultra low-noise amplifiers in standard integrated circuit technology.

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