scholarly journals A 920-MHz Dual-Mode Receiver with Energy Harvesting for UHF RFID Tag and IoT

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 1042
Author(s):  
Peiqing Han ◽  
Zhaofeng Zhang ◽  
Yajun Xia ◽  
Niansong Mei
Keyword(s):  
Energy Harvesting ◽  
Low Power ◽  
Radio Frequency Identification ◽  
Supply Voltage ◽  
High Sensitivity ◽  
Cmos Process ◽  
Uhf Rfid ◽  
Dual Mode ◽  
Operating Modes ◽  
On Chip

A low-power dual-mode receiver is presented for ultra-high-frequency (UHF) radio frequency identification (RFID) systems. The reconfigurable architecture of the tag is proposed to be compatible with low-power and high-sensitivity operating modes. The read range of RFID system and the lifetime of the tag are increased by photovoltaic, thermoelectric and RF energy-harvesting topology. The receiver is implemented in a 0.18-μm standard CMOS process and occupies an active area of 0.65 mm × 0.7 mm. For low-power mode, the tag is powered by the rectifier and the sensitivity is −18 dBm. For high-sensitivity mode, the maximum PCE of the fully on-chip energy harvester is 46.5% with over 1-μW output power and the sensitivity is −40 dBm with 880 nW power consumption under the supply voltage of 0.8 V.

Low-Power Passive/Active UHF RFID Tag Transceiver with Frequency Locked On-chip Oscillator

2020 ◽  
Vol 29 (14) ◽  
pp. 2050234 ◽  
Author(s):  
Peiqing Han ◽  
Zhaofeng Zhang ◽  
Niansong Mei
Keyword(s):  
Radio Frequency Identification ◽  
Supply Voltage ◽  
Operating Mode ◽  
Cmos Process ◽  
Uhf Rfid ◽  
Passive Mode ◽  
Rfid Tag ◽  
Active Mode ◽  
Frequency Identification ◽  
On Chip

A reconfigurable architecture is presented to be compatible with conventional passive operating mode and active mode for ultrahigh frequency (UHF) and radio-frequency identification (RFID) tag. The transceiver with frequency locked on-chip oscillator is proposed to increase the read range of RFID system and the lifetime of tag. The transceiver is fabricated in 0.18[Formula: see text][Formula: see text]m standard CMOS process with the active area of 0.246[Formula: see text]mm2. For passive mode, the sensitivity of tag is [Formula: see text][Formula: see text]dBm. For the active mode, the sensitivity is [Formula: see text][Formula: see text]dBm only consuming 1.2[Formula: see text][Formula: see text]W under the supply voltage of 0.8[Formula: see text]V. The output power is [Formula: see text][Formula: see text]dBm for active transmitting mode and the power consumption is 450[Formula: see text][Formula: see text]W under the supply voltage of 1[Formula: see text]V.

scholarly journals Quasi-Adiabatic SRAM Based Silicon Physical Unclonable Function

2020 ◽  
Vol 1 (5) ◽  
Author(s):  
Yasuhiro Takahashi ◽  
Hiroki Koyasu ◽  
S. Dinesh Kumar ◽  
Himanshu Thapliyal
Keyword(s):  
Low Power ◽  
Radio Frequency Identification ◽  
Supply Voltage ◽  
Electronic Devices ◽  
Random Access ◽  
Cmos Process ◽  
Physical Unclonable Function ◽  
Ultra Low Power ◽  
Measurement Results ◽  
Simulation Results

Abstract Silicon Physical Unclonable Function (PUF) is a general hardware security primitive for security vulnerabilities. Recently, Quasi-adiabatic logic based physical unclonable function (QUALPUF) has ultra low-power dissipation; hence it is suitable to implement in low-power portable electronic devices such radio frequency identification (RFID) and wireless sensor networks (WSN), etc. In this paper, we present a design of 4-bit QUALPUF which is based on static random access memory (SRAM) for low-power portable electronic devices and then shows the post-layout simulation and measurement results. To evaluate the uniqueness and reliability, the 4-bit QUALPUF is implemented in 0.18 $$\upmu$$ μ m standard CMOS process with 1.8 V supply voltage. The 4-bit QUALPUF occupies 58.7$$\times$$ × 15.7 $$\upmu \mathrm {m}^{2}$$ μ m 2 of layout area. The post-layout simulation results illustrate that the uniqueness calculated from the inter-die HDs of the 4-bit QUALPUF is 47.58%, the average reliability is 95.10%, and the the energy dissipation is 29.73 fJ/cycle/bit. The functional measurement results of the fabricated chip are the same as the post-layout simulation results.

scholarly journals Energy Efficient Bandgap Reference Generator for RFID Transponder EEPROM in 130 nm CMOS Process

2019 ◽  
Vol 8 (4) ◽  
pp. 6422-6426
Keyword(s):  
Low Power ◽  
Radio Frequency Identification ◽  
Energy Efficient ◽  
Supply Voltage ◽  
Reducing Power ◽  
Cmos Technology ◽  
Cmos Process ◽  
Bandgap Reference ◽  
Internal Reference ◽  
Power Supply Voltage

Reducing power dissipation of any circuit can make that circuit more energy-efficient and at the same time promise stability. Recent researchers mainly focus on controlling and monitoring low power designs for different low power applications, wireless systems such as radio frequency identification (RFID) transponder. Therefore, generating an internal reference voltage (VR) for the power management unit is the key challenges for researchers to design such applications. Bandgap reference (BGR) is an essential module that assures temperature and independent VR supply in analog circuits. In this research, an improved BGR is designed with the self-startup circuit, bandgap core and an operational amplifier (OP-AMP) to generate a stable VR. A low-power BGR is simulated using Silterra 130 nm CMOS technology. The designed BGR generates a VR of 1.1 V and consumes only 1.4 µA power form 1.2 V power supply voltage. Moreover, it has a temperature coefficient of 41.6 ppm/℃.

scholarly journals Adaptive Noise-Resistant Low-Power ASK Demodulator Design in UHF RFID Chips

Electronics ◽  
2021 ◽  
Vol 10 (24) ◽  
pp. 3168
Author(s):  
Yao-Hua Xu ◽  
Shuai Yang ◽  
Hang Li ◽  
Ji-Ming Lv ◽  
Na Bai
Keyword(s):  
Low Power ◽  
Input Signal ◽  
Radio Frequency Identification ◽  
High Frequency ◽  
Noise Immunity ◽  
Cmos Process ◽  
Uhf Rfid ◽  
Envelope Detector ◽  
Shift Keying ◽  
A Charge

This paper presents a new signal demodulator for ultra-high frequency (UHF) radio frequency identification (RFID) tag chips. The demodulator is used to demodulate amplitude shift keying (ASK) modulated signals with the advantages of high noise immunity, large input range and low power consumption. The demodulator consists of a charge pump, an envelope detector, and a comparator. In particular, the demodulator provides a hysteresis input signal to the comparator through two envelope detectors, resulting in better noise immunity. The demodulator is based on a standard 0.13 µm CMOS process. The demodulator is suitable for demodulating high frequency signals at 900 MHz with a data rate of 128 Kbps and can operate up to 78 °C. The input signal has a peak of 1.2 V and consumes as little as 113.6 nW. The demodulator also has a noise immunity threshold of approximately 3.729 V.

scholarly journals The Implementation of a Low Power Environmental Monitoring and Soil Moisture Measurement System Based on UHF RFID

Sensors ◽  
2019 ◽  
Vol 19 (24) ◽  
pp. 5527 ◽  
Author(s):  
Žiga Korošak ◽  
Nejc Suhadolnik ◽  
Anton Pleteršek
Keyword(s):  
Low Power ◽  
Measurement System ◽  
Radio Frequency Identification ◽  
Supply Voltage ◽  
Measurement Properties ◽  
Capacitance Measurement ◽  
Uhf Rfid ◽  
Active System ◽  
Ultra Low Power ◽  
Moisture Sensor

A smart sensor label based on the integration of ultra high frequency (UHF) radio frequency identification (RFID) technology and sensors is presented. The label is composed of a semi-active system that measures temperature, light, relative humidity and gravimetric water content (GWC) in the soil. The deployed system provides a simple, cost effective solution to monitor and control the growing of plants in modern agriculture and is intended be a part of a smart wireless sensor network (WSN) for agricultural monitoring. This paper is focused on analysis and development of a moisture sensor to measure GWC. It is based on a capacitance measurement solution, the accuracy of which is enhanced using several sensor driving frequencies. Thanks to the cancellation of supply voltage variations, the modeling of the GWC sensor and readout circuit was correct. The results we measured were close to modeled values. The maximum measurement resolution of the capacitive moisture sensor was 0.07 pF. To get the GWC from measured capacitance, a scale was used to weigh the mass of water in the soil. The comparison between capacitance measurement and calculated soil GWC is presented. The RFID measurement system has energy harvesting capabilities and an ultra-low power microcontroller, which uses embedded software to control the measurement properties. The microcontroller has to choose the appropriate model depending on the measured amplitude and chosen frequency to calculate the actual voltage on the sensing capacitor.

scholarly journals A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate

2021 ◽  
Vol 11 (2) ◽  
pp. 19
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Process ◽  
Slew Rate ◽  
Large Signal ◽  
Output Stage ◽  
Ultra Low Power ◽  
Input Stage ◽  
Rail To Rail

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.

Low-Power and Reference-Less Data and Clock Recovery Circuit for Visible Light Receivers

2018 ◽  
Author(s):  
Ming-Cheng Liu ◽  
Paul C.-P. Chao ◽  
Soh Sze Khiong
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Visible Light ◽  
Low Voltage ◽  
Supply Voltage ◽  
Clock And Data Recovery ◽  
Optical Receiver ◽  
Clock Recovery ◽  
Cmos Process ◽  
Rf Receiver

In this paper a low power all-digital clock and data recovery (ADCDR) with 1Mhz frequency has been proposed. The proposed circuit is designed for optical receiver circuit on the battery-less photovoltaic IoT (Internet of Things) tags. The conventional RF receiver has been replaced by the visible light optical receiver for battery-less IoT tags. With this proposed ADCDR a low voltage, low power consumption & tiny IoT tags can be fabricated. The proposed circuit achieve the maximum bandwidth of 1MHz, which is compatible with the commercial available LED and light sensor. The proposed circuit has been fabricated in TSMC 0.18um 1P6M standard CMOS process. Experimental results show that the power consumption of the optical receiver is approximately 5.58uW with a supply voltage of 1V and the data rate achieves 1Mbit/s. The lock time of the ADCDR is 0.893ms with 3.31ns RMS jitter period.

scholarly journals Ultra low power mixer with out-of-band RF energy harvesting for wireless sensor networks applications

2020 ◽  
Vol 40 (1) ◽  
pp. 1-6
Author(s):  
Jie Jin ◽  
Xianming Wu ◽  
Zhijun Li
Keyword(s):  
Energy Harvesting ◽  
Low Power ◽  
Wireless Sensors ◽  
Supply Voltage ◽  
Battery Life ◽  
Ic Design ◽  
Rf Energy Harvesting ◽  
Ultra Low Power ◽  
Rf Energy ◽  
Cmos Rf

An ultra low power mixer with out-of-band radio frequency (RF) energy harvesting suitable for the wireless sensors network (WSN) application is proposed in this paper. The presented mixer is able to harvest the out-of-band RF energy and keep it working in ultra low power condition and extend the battery life of the WSN. The mixer is designed and simulated with Global Foundries ’ 0.18 μ m CMOS RF process, and it operates at 2.4GHz industrial, scientific, and medical (ISM) band. The Cadence IC Design Tools post-layout simulation results demonstrate that the proposed mixer consumes 248 μ W from a 1V supply voltage. Furthermore, the power consumption can be reduced to 120.8 μ W by the out-of-band RF energy harvesting rectifier.

A ΣΔ MODULATOR USING GAIN-BOOST CLASS-C INVERTER FOR AUDIO APPLICATIONS

2013 ◽  
Vol 22 (10) ◽  
pp. 1340024
Author(s):  
HAO LUO ◽  
YAN HAN ◽  
RAY C. C. CHEUNG ◽  
TIANLIN CAO ◽  
XIAOPENG LIU ◽  
...  
Keyword(s):  
High Resolution ◽  
Dynamic Range ◽  
Supply Voltage ◽  
Cmos Process ◽  
Signal To Noise ◽  
Dc Gain ◽  
Micro Power ◽  
Class C ◽  
On Chip ◽  
Σδ Modulator

This paper provides an audio 2-1 cascaded ΣΔ modulator using a novel gain-boost class-C inverter. The gain-boost class-C inverter behaves as a subthreshold amplifier. By introducing a gain-boost module, the inverter DC-gain is increased from 48 dB to 67 dB. The gain-boost class-C inverter consumes 57 μW at 1.2-V supply, where the gain-boost module consumes only 3 μW. In addition, an on-chip body bias technique is introduced to compensate the process and supply voltage variations of the class-C inverter. The proposed inverter-based ΣΔ modulator chip is implemented in 0.13-μm CMOS process, and achieves 86-dB peak-signal to noise and distortion ratio (SNDR) and 90-dB dynamic range (DR) over 22.05-KHz bandwidth at 1.2-V supply consuming 360 μW, which demonstrates that the gain-boost class-C inverter is particularly suitable for micro-power high-resolution applications.

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