scholarly journals Design and Analysis of fT-Doubler-Based RF Amplifiers in SiGe HBT Technology

Electronics ◽  
2020 ◽  
Vol 9 (5) ◽  
pp. 772
Author(s):  
Md Sarker ◽  
Ickhyun Song
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Silicon Germanium ◽  
Noise Figure ◽  
High Gain ◽  
Center Frequency ◽  
Sige Hbt ◽  
Multi Stage ◽  
Amplifier Design ◽  
Small Form Factor ◽  
Silicon Vias

For performance-driven systems such as space-based applications, it is important to maximize the gain of radio-frequency amplifiers (RFAs) with a certain tolerance against radiation, temperature effects, and small form factor. In this work, we present a K-band, compact high-gain RFA using an fT-doubler topology in a silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) technology platform. The through-silicon vias (TSVs), typically used for small-size chip packaging purposes, have been effectively utilized as an adjustable matching element for input impedance, reducing the overall area of the chip. The proposed RFA, fabricated in a modest 0.35 µm SiGe technology, achieves a gain of 14.1 dB at 20 GHz center frequency, and a noise figure (NF) of 11.2 dB at the same frequency, with a power consumption of 3.3 mW. The proposed design methodology can be used for achieving high gain, avoiding a complex multi-stage amplifier design approach.

J-band amplifier design using gain-enhanced cascodes in 0.13 μm SiGe

2015 ◽  
Vol 7 (3-4) ◽  
pp. 339-347 ◽  
Author(s):  
Stefan Malz ◽  
Bernd Heinemann ◽  
Rudolf Lachner ◽  
Ullrich R. Pfeiffer
Keyword(s):  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Small Signal ◽  
Sige Hbt ◽  
Bicmos Technology ◽  
Signal Amplifier ◽  
Sige Bicmos ◽  
Amplifier Design ◽  
Noise Amplifier

This paper presents two J-band amplifiers in different 0.13 μm SiGe technologies: a small signal amplifier (SSA) in a technology in which never before gain has been shown over 200 GHz; and a low noise amplifier (LNA) design for 230 GHz applications in an advanced SiGe HBT technology with higher fT/fmax, demonstrating the combination of high gain, low noise, and low power in a single amplifier. Both circuits consist of a four-stage pseudo-differential cascode topology. By employing series–series feedback at the single-stage level the small-signal gain is increased, enabling circuit operation at high-frequencies and with improved efficiency, while maintaining unconditional stability. The SSA was fabricated in a SiGe BiCMOS technology by Infineon with fT/fmax values of 250/360 GHz. It has measured 19.5 dB gain at 212 GHz with a 3 dB bandwidth of 21 GHz. It draws 65 mA from a 3.3 V supply. On the other hand, a LNA was designed in a SiGe BiCMOS technology by IHP with fT/fmaxof 300/450 GHz. The LNA has measured 22.5 dB gain at 233 GHz with a 3 dB bandwidth of 10 GHz and a simulated noise figure of 12.5 dB. The LNA draws only 17 mA from a 4 V supply. The design methodology, which led to these record results, is described in detail with the LNA as an example.

scholarly journals Sub-THz and THz SiGe HBT Electrical Compact Modeling

Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1397
Author(s):  
Bishwadeep Saha ◽  
Sebastien Fregonese ◽  
Anjan Chakravorty ◽  
Soumya Ranjan Panda ◽  
Thomas Zimmer
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Silicon Germanium ◽  
High Frequency ◽  
State Of The Art ◽  
Sensitivity Study ◽  
Compact Modeling ◽  
Process Technology ◽  
Very High Frequency ◽  
Sige Hbt ◽  
Frequency Behavior

From the perspectives of characterized data, calibrated TCAD simulations and compact modeling, we present a deeper investigation of the very high frequency behavior of state-of-the-art sub-THz silicon germanium heterojunction bipolar transistors (SiGe HBTs) fabricated with 55-nm BiCMOS process technology from STMicroelectronics. The TCAD simulation platform is appropriately calibrated with the measurements in order to aid the extraction of a few selected high-frequency (HF) parameters of the state-of-the-art compact model HICUM, which are otherwise difficult to extract from traditionally prepared test-structures. Physics-based strategies of extracting the HF parameters are elaborately presented followed by a sensitivity study to see the effects of the variations of HF parameters on certain frequency-dependent characteristics until 500 GHz. Finally, the deployed HICUM model is evaluated against the measured s-parameters of the investigated SiGe HBT until 500 GHz.

scholarly journals Noise Parameter Analysis of SiGe HBTs for Different Sizes in the Breakdown Region

2016 ◽  
Vol 2016 ◽  
pp. 1-5
Author(s):  
Chie-In Lee ◽  
Yan-Ting Lin ◽  
Wei-Cheng Lin
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Silicon Germanium ◽  
Noise Figure ◽  
Rf Circuits ◽  
Bipolar Transistors ◽  
Parameter Analysis ◽  
Noise Performance ◽  
Noise Spectral Density ◽  
Breakdown Mechanism ◽  
Breakdown Region

Noise parameters of silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) for different sizes are investigated in the breakdown region for the first time. When the emitter length of SiGe HBTs shortens, minimum noise figure at breakdown decreases. In addition, narrower emitter width also decreases noise figure of SiGe HBTs in the avalanche region. Reduction of noise performance for smaller emitter length and width of SiGe HBTs at breakdown resulted from the lower noise spectral density resulting from the breakdown mechanism. Good agreement between experimental and simulated noise performance at breakdown is achieved for different sized SiGe HBTs. The presented analysis can benefit the RF circuits operating in the breakdown region.

A SiGe HBT IC CHIPSET for40-Gb/s OPTICAL TRANSMISSION SYSTEMS

2003 ◽  
Vol 13 (01) ◽  
pp. 239-263
Author(s):  
T. MASUDA ◽  
N. SHIRAMIZU ◽  
E. OHUE ◽  
K. ODA ◽  
R. HAYAMI ◽  
...  
Keyword(s):  
Silicon Germanium ◽  
Optical Transmission ◽  
High Gain ◽  
Transimpedance Amplifier ◽  
Transmission Systems ◽  
Sige Hbt ◽  
Limiting Amplifier ◽  
Optical Transmission Systems ◽  
Decision Circuit ◽  
Time Division

Using a 0.2-μm self-aligned epitaxial-growth silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology, we have developed a chipset for 40-Gb/s time-division multiplexing optical transmission systems. In this paper, we describe seven analog and digital ICs: a 45-GHz bandwidth transimpedance amplifier, a 48.7-GHz bandwidth automatic-gain-controllable amplifier, a 40-Gb/s decision circuit, a 40-Gb/s full-wave rectifier, a 40-Gb/s limiting amplifier with a 32-dB gain, a 45-Gb/s 1:4 demultiplexer, and a 45-Gb/s 4:1 multiplexer. To increase bandwidth of the transimpedance amplifier, a common-base input stage is introduced. In order to have high gain and wide bandwidth simultaneously, active load circuits composed of a differential transimpedance amplifier are used for the AGC amplifier, the limiting amplifier, and the decision circuit. Full-rate clocking is employed to reduce the influence caused by clock-duty variation in digital circuits such as the decision circuit, the demultiplexer, and the multiplexer. All ICs were characterized by using on-wafer probes, and some of them were built in brass-packages for bit-error rate measurement.

scholarly journals Differential CMOS Low Noise Amplifier Design for Wireless Receivers

2019 ◽  
Vol 8 (4) ◽  
pp. 2467-2474 ◽  
Keyword(s):  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Good Stability ◽  
Stability Factor ◽  
Cmos Process ◽  
Wireless Receiver ◽  
Reverse Isolation ◽  
Amplifier Design ◽  
Noise Amplifier

This article presents the differential CMOS-LNA design for wireless receiver at the frequency of 3.4GHz. This differential 𝑳𝑵𝑨 provides less noise figure (NF), high gain and good reverse isolation as well as good stability. The designed LNA is simulated with a 180 nanometers CMOS process in cadence virtuoso tool and simulate the results by using SpectreRF simulator. This LNA exhibits a NF of 0.7dB, a high voltage gain of 28dB, and good reverse isolation (S12) of -70dB. It produces an input and output reflection coefficient (S11) of - 6.5dB and (S22) of -14dB, and it maintains good stability of Rollet factor Kf > 1, and also alternate stability factor B1f < 1, respectively.

Advantages of utilizing through-silicon-vias in SiGe HBT RF low-noise amplifier design

2015 ◽  
Vol 57 (11) ◽  
pp. 2703-2706 ◽  
Author(s):  
Ickhyun Song ◽  
Moon-Kyu Cho ◽  
Seungwoo Jung ◽  
Inchan Ju ◽  
John D. Cressler
Keyword(s):  
Low Noise ◽  
Low Noise Amplifier ◽  
Through Silicon Vias ◽  
Sige Hbt ◽  
Amplifier Design ◽  
Noise Amplifier ◽  
Silicon Vias

scholarly journals High-Gain Power-Efficient Front- and Back-End Designs for a 90 nm Transmit-Reference Receiver

2012 ◽  
Vol 2012 ◽  
pp. 1-15
Author(s):  
Apratim Roy
Keyword(s):  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Center Frequency ◽  
Control Voltage ◽  
Power Efficient ◽  
Passive Network ◽  
Noise Amplifier ◽  
Improved Performance ◽  
Matching Techniques

A new microwave receiver configuration which transmits reference pulses embedded in data streams for synchronization is analyzed with a 90-nm IBM CMOS standard. A two-stage cascode low-noise amplifier (LNA) is proposed for the receiver front-end which is matched by a passive network to save on power-expensive matching techniques. The amplifier exploits a double-differential topology and achieves a below 4 dB noise figure near the center frequency. The overall 3-dB bandwidth is 3.3 GHz with peaking up to 20.5 dB in the -band. The back-end of the receiver is implemented through an adjustable analog window-detection circuit. It avoids the use of control voltage generators and sample-hold (S/H) blocks to save electronic overhead and is simulated with a 0.1~2.0 Gbps pulse stream. The achieved speed-to-power ratio for the back-end has a maximum limit of 266 GHz/W. When compared against simulated results of published literature, the proposed designs show improved performance in terms of small-signal gain, noise, speed, and power dissipation.

TOTAL-DOSE AND SINGLE-EVENT EFFECTS IN SILICON-GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTORS

2004 ◽  
Vol 14 (02) ◽  
pp. 489-501
Author(s):  
JOHN D. CRESSLER
Keyword(s):  
Ionizing Radiation ◽  
Heterojunction Bipolar Transistors ◽  
Silicon Germanium ◽  
Radiation Effects ◽  
Bipolar Transistors ◽  
Electronic Systems ◽  
Single Event ◽  
Sige Hbt ◽  
Radiation Induced ◽  
The Impact

We present an overview of radiation effects in silicon-germanium heterojunction bipolar transistors ( SiGe HBT). We begin by reviewing SiGe HBTs, and then examine the impact of ionizing radiation on both the dc and ac performance of SiGe HBTs, the circuit-level impact of radiation-induced changes in the transistors, followed by single-event phenomena in SiGe HBT circuits. While ionizing radiation degrades both the dc and ac properties of SiGe HBTs, this degradation is remarkably minor, and is far better than that observed in even radiation-hardened conventional Si BJT technologies. This fact is particularly significant given that no intentional radiation hardening is needed to ensure this level of both device-level and circuit-level tolerance (typically multi-Mrad TID). SEU effects are pronounced in SiGe HBT circuits, as expected, but circuit-level mitigation schemes will likely be suitable to ensure adequate tolerance for many orbital missions. SiGe HBT technology thus offers many interesting possibilities for space-borne electronic systems.

TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

1995 ◽  
Vol 53 ◽  
pp. 468-469
Author(s):  
N. David Theodore ◽  
Donald Y.C Lie ◽  
J. H. Song ◽  
Peter Crozier
Keyword(s):  
Integrated Circuits ◽  
Heterojunction Bipolar Transistors ◽  
Integrated Circuit ◽  
High Speed ◽  
Room Temperature ◽  
Strain Relaxation ◽  
Bipolar Transistors ◽  
Sige Hbt ◽  
Integrated Circuit Manufacturing ◽  
Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

Improvement of Gain Accuracy and CMRR of Low Power Instrumentation Amplifier Using High Gain Operational Amplifiers

2020 ◽  
Vol 12 (3) ◽  
pp. 168-174
Author(s):  
Rashmi Sahu ◽  
Maitraiyee Konar ◽  
Sudip Kundu
Keyword(s):  
Low Power ◽  
Building Blocks ◽  
High Gain ◽  
The Other ◽  
Operational Amplifiers ◽  
Instrumentation Amplifier ◽  
Biomedical Signals ◽  
Op Amp ◽  
Op Amps ◽  
Multi Stage

Background: Sensing of biomedical signals is crucial for monitoring of various health conditions. These signals have a very low amplitude (in μV) and a small frequency range (<500 Hz). In the presence of various common-mode interferences, biomedical signals are difficult to detect. Instrumentation amplifiers (INAs) are usually preferred to detect these signals due to their high commonmode rejection ratio (CMRR). Gain accuracy and CMRR are two important parameters associated with any INA. This article, therefore, focuses on the improvement of the gain accuracy and CMRR of a low power INA topology. Objective: The objective of this article is to achieve high gain accuracy and CMRR of low power INA by having high gain operational amplifiers (Op-Amps), which are the building blocks of the INAs. Methods: For the implementation of the Op-Amps and the INAs, the Cadence Virtuoso tool was used. All the designs and implementation were realized in 0.18 μm CMOS technology. Results: Three different Op-Amp topologies namely single-stage differential Op-Amp, folded cascode Op-Amp, and multi-stage Op-Amp were implemented. Using these Op-Amp topologies separately, three Op-Amp-based INAs were realized and compared. The INA designed using the high gain multistage Op-Amp topology of low-frequency gain of 123.89 dB achieves a CMRR of 164.1 dB, with the INA’s gain accuracy as good as 99%, which is the best when compared to the other two INAs realized using the other two Op-Amp topologies implemented. Conclusion: Using very high gain Op-Amps as the building blocks of the INA improves the gain accuracy of the INA and enhances the CMRR of the INA. The three Op-Amp-based INA designed with the multi-stage Op-Amps shows state-of-the-art characteristics as its gain accuracy is 99% and CMRR is as high as 164.1 dB. The power consumed by this INA is 29.25 μW by operating on a power supply of ±0.9V. This makes this INA highly suitable for low power measurement applications.

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