scholarly journals A Novel General Purpose Combined DFVF/VCII Based Biomedical Amplifier

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 331
Author(s):  
Vincenzo Stornelli ◽  
Gianluca Barile ◽  
Alfiero Leoni

We here present a 0.15 µm CMOS high input impedance and low noise AC coupled flipped voltage follower-based amplifier for high integration level in integrated circuits in a wide range of sensing applications. With such a circuit, it is possible to achieve a high level of integration, thanks to the absence of passive resistors, and also to implement a very high input impedance without capacitive feedback thanks to bootstrap operation, thus offering a very low high-pass cutoff frequency. Simulated results with a proven and well modeled standard technology show a whole circuit input-referred noise of 5.4 µVrms. The bias voltage is ±0.6 V with a total power consumption of the single amplifier of 20 µW. The very low circuit complexity allows a very low estimated reduced area occupation giving, as a general example, the possibility of integrating an array of up to thousands of channels for biomedical applications. Detailed simulation results, PVT analysis and comparison tables are also presented in the paper.

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 165 ◽  
Author(s):  
Weilin Xu ◽  
Taotao Wang ◽  
Xueming Wei ◽  
Hongwei Yue ◽  
Baolin Wei ◽  
...  

The portable real-time electrocardiogram (ECG) is a convenient and promising electronic device for cardiovascular diseases patients. However, unlike wet gel electrodes in traditional clinical applications, dry electrodes are competent for comfortable long-time wearing and can prevent skin ulceration. Its ultra-high source impedance and electrode offset (EOS) make traditional chopper amplifiers with low input impedance and limited EOS range difficult to apply to this area. To overcome these challenges, this paper proposes a novel chopper amplifier topology. This architecture includes a gain control loop, a ripple reduction loop, and a DC-servo loop (DSL). The proposed sampling input stage and digital-analog hybrid DSL are employed to boost input impedance and extend the EOS handing range. Designed with a 0.18 µm 1P6M 1.8 V CMOS salicide process, the proposed chopper capacitively coupled instrumentation amplifier achieves an ultra-high input impedance of 120 GΩ (<0.05 Hz) or 2.1 GΩ (0.6~250 Hz), an EOS handing range of ±325 mV and a low noise of 1.9 μVrms at 0.6~250 Hz. It occupies an area of 0.36 mm2 and only consumes a quiescent current of 11 μA.


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