scholarly journals 16.8/15.2 ppm/°C 81 nW High PSRR Dual-Output Voltage Reference for Portable Biomedical Application

Electronics ◽  
2019 ◽  
Vol 8 (2) ◽  
pp. 213 ◽  
Author(s):  
Hongwei Yue ◽  
Xiaofei Sun ◽  
Junxin Liu ◽  
Weilin Xu ◽  
Haiou Li ◽  
...  
Keyword(s):  
Power Consumption ◽  
Output Voltage ◽  
Biomedical Application ◽  
Cmos Process ◽  
Voltage Reference ◽  
Subthreshold Region ◽  
Chip Area ◽  
Power Supply Rejection Ratio ◽  
Current Mirrors ◽  
Reference Circuit

A dual-output voltage reference circuit with two reference voltages of 281 mV (Vref1) and 320.5 mV (Vref2) is presented in this paper. With a novel and precise circuit structure, the proposed circuit, operating in the subthreshold region, integrates two different output voltages into a circuit to form a dual-output voltage reference, and cascode current mirrors are used to enhance the power supply rejection ratio (PSRR). The proposed circuit was designed in a standard 0.18-µm CMOS process and has a series of attractive features: low-temperature coefficient (TC), high-PSRR, low-Line sensitivity (LS), small-chip area and low-power consumption. Monte Carlo simulations for 2000 samples showed that the output voltages 281 mV and 320.5 mV had a variation coefficient of 1.73% and 1.44%, respectively. The minimum power consumption was 84.1 nW at 0.9 V supply, proving that the circuit is suitable for portable biomedical application. The active area of the proposed voltage reference was only 0.0086 mm2.

A Novel Low Line Regulation Voltage Reference with No Amplifier

2018 ◽  
Vol 27 (10) ◽  
pp. 1850152 ◽  
Author(s):  
Qiang Li Li ◽  
WanLing Deng ◽  
Xiao Yu Ma ◽  
JunKai Huang
Keyword(s):  
Power Supply ◽  
Output Voltage ◽  
Power Supplies ◽  
Cmos Process ◽  
Voltage Reference ◽  
Bipolar Junction Transistor ◽  
Rejection Ratio ◽  
Power Supply Rejection Ratio ◽  
Junction Transistor ◽  
Simulation Results

A novel low line regulation voltage reference (VR) without an amplifier is presented in this paper. The design is achieved by subtracting two voltages which have the same temperature curves. All circuits use only one Bipolar Junction Transistor (BJT) to decrease the area greatly. Designed with the SMIC 0.18[Formula: see text][Formula: see text]m CMOS process, the simulation results show that the output voltage is 0.902[Formula: see text]V at TT process corner when the power supply is larger than 1.7[Formula: see text]V. The temperature coefficient (TC) is 3.6[Formula: see text]ppm/[Formula: see text]C to 7.4[Formula: see text]ppm/[Formula: see text]C at different power supplies and process corners. The simulated power supply rejection ratio (PSRR) is [Formula: see text]80[Formula: see text]dB at TT process corner when the power supply is 2.5[Formula: see text]V, and the PSRR at different process corners are almost the same. The line regulation of the proposed circuit is 0.005[Formula: see text]mV/V.

A New No Op Amp Full CMOS Voltage Reference Circuit

2014 ◽  
Vol 519-520 ◽  
pp. 1067-1070
Author(s):  
Jian Ying Shi ◽  
Hui Ya Li ◽  
Yan Bin Xu
Keyword(s):  
Power Consumption ◽  
Temperature Coefficient ◽  
Output Voltage ◽  
Supply Voltage ◽  
Absolute Temperature ◽  
Voltage Reference ◽  
Op Amp ◽  
Reference Circuit ◽  
Simulation Results ◽  
Cmos Voltage Reference

A no op amp structure full CMOS reference voltage circuit is designed. The two currents which are proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) are added together to get the reference output voltage which is obtained through a resistance. The characteristics of the new circuit are simulated using 0.5 μm BSIM3V3 spice models in HSPICE. The simulation results show that the output voltage of the circuit is 997mV, the power consumption is 1.12mW, the temperature coefficient is 15.2 ppm/°C in the range from-30°C to 100°C at the supply voltage of 2V.

A Bandgap Reference with Temperature Coefficient of 13.2 ppm/°C

2014 ◽  
Vol 981 ◽  
pp. 66-69
Author(s):  
Ming Yuan Ren ◽  
En Ming Zhao
Keyword(s):  
Power Supply ◽  
Process Simulation ◽  
Output Voltage ◽  
Operating Temperature ◽  
Cmos Process ◽  
Bandgap Reference ◽  
Analysis Method ◽  
Operation Condition ◽  
Reference Circuit ◽  
Simulation Results

This paper presents a design and analysis method of a bandgap reference circuit. The Bandgap design is realized through the 0.18um CMOS process. Simulation results show that the bandgap circuit outputs 1.239V in the typical operation condition. The variance rate of output voltage is 0.016mV/°C? with the operating temperature varying from-60°C? to 160°C?. And it is 3.27mV/V with the power supply changes from 1.8V to 3.3V.

Ground-Adjustable Inductor for Wide-Tuning VCO Design

2012 ◽  
Vol 256-259 ◽  
pp. 2373-2378
Author(s):  
Wu Shiung Feng ◽  
Chin I Yeh ◽  
Ho Hsin Li ◽  
Cheng Ming Tsao
Keyword(s):  
Power Consumption ◽  
Tuning Range ◽  
Supply Voltage ◽  
Wide Band ◽  
Ultra Wide Band ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Wide Tuning Range ◽  
Chip Area ◽  
Ground Plate

A wide-tuning range voltage-controlled oscillator (VCO) with adjustable ground-plate inductor for ultra-wide band (UWB) application is presented in this paper. The VCO was implemented by standard 90nm CMOS process at 1.2V supply voltage and power consumption of 6mW. The tuning range from 13.3 GHz to 15.6 GHz with phase noise between -99.98 and -115dBc/Hz@1MHz is obtained. The output power is around -8.7 to -9.6dBm and chip area of 0.77x0.62mm2.

A Design of Low Temperature Dependence Voltage Reference Circuit for PWM Controller

2013 ◽  
Vol 310 ◽  
pp. 448-452
Author(s):  
Zhi Chao Zhao ◽  
Tie Feng Wu ◽  
Jing Li ◽  
Li Min Li ◽  
Qie Pan ◽  
...  
Keyword(s):  
Low Temperature ◽  
Temperature Dependence ◽  
High Performance ◽  
Voltage Reference ◽  
Zener Diode ◽  
Rejection Ratio ◽  
Power Supply Rejection Ratio ◽  
Bipolar Voltage ◽  
Compensation Principle ◽  
Reference Circuit

In order to provide steady voltage for PWM controller, a design of bipolar voltage reference circuit with high performance is presented. The circuit based on the compensation principle between Zener diode and B-E junction of triode is used in PWM controller and can bring out multi-way steady voltages, moreover, there is a high power supply rejection ratio (PSRR) and low temperature dependence. The results of simulation and test in Candence with bipolar process of HuaYue SB45 show that the temperature coefficient is about 1.2ppm/°C in the temperature range -55~125°C. The line regulation is about 0.4mV/V in 8~30V and the PSRR is 77.54dB. The design of circuit can satisfy the requirements of PWM controller.

A High-Order CMOS Bandgap Voltage Reference

2014 ◽  
Vol 989-994 ◽  
pp. 1165-1168
Author(s):  
Qian Neng Zhou ◽  
Yun Song Li ◽  
Jin Zhao Lin ◽  
Hong Juan Li ◽  
Chen Li ◽  
...  
Keyword(s):  
Power Supply ◽  
Supply Voltage ◽  
Absolute Temperature ◽  
High Order ◽  
Cmos Process ◽  
Voltage Reference ◽  
Power Supply Voltage ◽  
Power Supply Rejection Ratio ◽  
Voltage Deviation ◽  
Bandgap Voltage Reference

A high-order bandgap voltage reference (BGR) is designed by adopting a current which is proportional to absolute temperature T1.5. The high-order BGR is analyzed and simulated in SMIC 0.18μm CMOS process. Simulation results show that the designed high-order BGR achieves temperature coefficient of 2.54ppm/°C when temperature ranging from-55°C to 125°C. The high-order BGR at 10Hz, 100Hz, 1kHz, 10kHz and 100kHz achieves, respectively, the power supply rejection ratio of-64.01dB, -64.01dB, -64dB, -63.5dB and-53.2dB. When power supply voltage changes from 1.7V to 2.5V, the output voltage deviation of BGR is only 617.6μV.

AN ADC BASED RANDOM BIT GENERATOR BASED ON A DOUBLE SCROLL CHAOTIC CIRCUIT

2010 ◽  
Vol 19 (07) ◽  
pp. 1621-1639 ◽  
Author(s):  
VEDAT TAVAS ◽  
AHMET S. DEMIRKOL ◽  
SERDAR OZOGUZ ◽  
ALI ZEKI ◽  
ALI TOKER
Keyword(s):  
Power Consumption ◽  
Frequency Spectrum ◽  
Continuous Time ◽  
Binary Data ◽  
Test Suite ◽  
Cmos Process ◽  
Chaotic Circuit ◽  
Chip Area ◽  
The Core ◽  
Random Bit Generator

An A/D converter based random bit generator which exploits continuous-time chaos is presented. The chaotic circuit, which is used as the core of the random bit generator generates double-scroll attractor the frequency spectrum of which spans up to 80 MHz. The chaotic circuit was fabricated using a 0.35 μm CMOS process and the chip area, excluding pads, is 0.06 mm2. Power consumption of the integrated chip is 8 mW. Binary data obtained from the presented random bit generator pass the full NIST-800-22 test suite.

scholarly journals A Power and Area Efficient CMOS Bandgap Reference Circuit with an Integrated Voltage-Reference Branch

2019 ◽  
Author(s):  
Santunu Sarangi ◽  
Dhananjaya Tripathy ◽  
Subhra Sutapa Mohapatra ◽  
Saroj Rout
Keyword(s):  
Total Power ◽  
Cmos Process ◽  
Bandgap Reference ◽  
Voltage Reference ◽  
Temperature Drift ◽  
Silicon Area ◽  
Total Power Consumption ◽  
Reference Circuit ◽  
Reference Design ◽  
Bipolar Device

This work presents a compact and low power bandgap voltage reference design using self-biased current mirror circuit. This design eliminates the standard complementary-to-absolute-temperature (CTAT) bipolar device in the voltage-reference branch, reducing the bipolar area by 20 percent. Instead, the design shares the same bipolar device in the main CTAT branch for generating the reference voltage. An additional benefit of eliminating the voltage-reference branch is the reduction of total power consumption by approximately 30 percent. This novel topology reduces power and area of the core bandgap reference circuit without compromising temperature drift performance. Designed, fabricated and functionally tested in a 0.6 um CMOS process. The simulation result shows the temperature coefficient of this design is 6.3 ppm/C for a temperature range of -40C to 125C$. This bandgap reference design occupies a silicon area of 0.018 mm^2 and draws an average quiescent current of 2 uA from a supply voltage of 3.3-5V. The simulated flicker voltage noise is 4.34 uV/sqrt-Hz at 10 Hz.

Integral Type Multi-Ramp for Single-Slope ADC

2013 ◽  
Vol 303-306 ◽  
pp. 1908-1912 ◽  
Author(s):  
Nan Lyu ◽  
Ning Mei Yu ◽  
He Jiu Zhang
Keyword(s):  
Power Consumption ◽  
High Speed ◽  
Supply Voltage ◽  
High Accuracy ◽  
Sampling Frequency ◽  
Cmos Process ◽  
Voltage Reference ◽  
Integral Type ◽  
Power Supply Voltage ◽  
The One

This paper presents a integral type Multi-ramp architecture apply to MRSS ADC (Multiple-ramp single-slope ADC).On the one hand to improve the capacitance mismatch by change voltage reference, On the other hand to reduced the power consumption greatly. Implemented in the GSMC 180nm 2P4M CMOS process, in the power supply voltage of 1.8 V, 11-bit resolution, 10 MHZ sampling frequency, the result of max power consumption is 1.33mW of single unit .The DNL < 0.1LSB and max INL < 0.49LSB .The Multi-ramp achieved requirements for high speed and high accuracy MRSS ADC.

DESIGN OF A CMOS BANDGAP REFERENCE CIRCUIT WITH A WIDE TEMPERATURE RANGE, HIGH PRECISION AND LOW TEMPERATURE COEFFICIENT

2014 ◽  
Vol 23 (08) ◽  
pp. 1450107 ◽  
Author(s):  
JUN-DA CHEN ◽  
CHENG-KAI YE
Keyword(s):  
Temperature Coefficient ◽  
High Precision ◽  
Supply Voltage ◽  
Cmos Process ◽  
Voltage Reference ◽  
Temperature Range ◽  
Wide Range ◽  
Bandgap Voltage Reference ◽  
Reference Circuit ◽  
Cmos Voltage Reference

This paper presents an approach to the design of a high-precision CMOS voltage reference. The proposed circuit is designed for TSMC 0.35 μm standard CMOS process. We design the first-order temperature compensation bandgap voltage reference circuit. The proposed post-simulated circuit delivers an output voltage of 0.596 V and achieves the reported temperature coefficient (TC) of 3.96 ppm/°C within the temperature range from -60°C to 130°C when the supply voltage is 1.8 V. When simulated in a smaller temperature range from -40°C to 80°C, the circuit achieves the lowest reported TC of 2.09 ppm/°C. The reference current is 16.586 μA. This circuit provides good performances in a wide range of temperature with very small TC.

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