scholarly journals Quasi Delay Insensitive Majority Voters for Triple Modular Redundancy Applications

2019 ◽  
Vol 9 (24) ◽  
pp. 5400 ◽  
Author(s):  
Padmanabhan Balasubramanian ◽  
Douglas L. Maskell ◽  
Nikos E. Mastorakis

Mission- and safety-critical applications tend to incorporate triple modular redundancy (TMR) in their hardware implementation to reliably withstand the fault or failure of any one of the function modules during normal operation, and the function module may be a circuit or a system. In a TMR implementation, two identical copies of a function module are used in addition to the original function module, and the correct operation of at least two function modules is required. In TMR, the corresponding primary outputs of the three function modules are combined using majority voters, which determine the actual primary outputs based on the Boolean majority. Hence, the majority voter is an important component that is useful for conveying the correct operation of a TMR implementation. In the existing literature, many designs of three-input majority voters for TMR have been discussed. However, most of these correspond to the synchronous design style and just one corresponds to the bundled-data asynchronous design style, which is not delay insensitive and hence non-robust. To our knowledge, a robust delay insensitive design of the three-input majority voter has not been considered. In this context, this article presents the designs of robust quasi delay insensitive (QDI) three-input majority voters based on QDI logic synthesis methods, and analyzes which majority voters are preferable in terms of speed, power, and area. We implement example QDI TMR circuits using a QDI full adder as the function module and QDI majority voters using 32/28 nm complementary metal oxide semiconductor (CMOS) technology. The QDI TMR implementations use the delay insensitive dual rail code for data encoding, and four-phase return-to-zero and four-phase return-to-one handshake protocols for data communication.

2021 ◽  
Vol 3 (1) ◽  
pp. 17-23
Author(s):  
Pramode Ranjan Bhattacharjee ◽  

A novel scheme for ensuring reliability in the operation of a combinational digital network has been offered in this paper. This has been achieved by making use of three copies of the same digital network along with two additional sub-networks, one of which consists of three additional control inputs, which can also be used as additional observable outputs. If both the said two sub-networks are fault free, then the primary output of the network in the present scheme will always give fault-free responses even if a fault (single or multiple) occurs in one of the three copies of the digital network under consideration. Unlike the Triple Modular Redundancy (TMR) scheme, the present scheme does not require any majority voter circuit. Furthermore, unlike the TMR scheme, the additional sub-networks in the present scheme can be tested off-line by predefined test input patterns.


PLoS ONE ◽  
2020 ◽  
Vol 15 (9) ◽  
pp. e0239395
Author(s):  
P. Balasubramanian ◽  
N. E. Mastorakis

Electronic circuits and systems employed in mission- and safety-critical applications such as space, aerospace, nuclear plants etc. tend to suffer from multiple faults due to radiation and other harsh external phenomena. To overcome single or multiple faults from affecting electronic circuits and systems, progressive module redundancy (PMR) has been suggested as a potential solution that recommends the use of different levels of redundancy for the vulnerable portions of a circuit or system depending upon their criticality. According to PMR, triple modular redundancy (TMR) can be used where a single fault is likely to occur and should be masked, and quintuple modular redundancy (QMR) can be used where double faults are likely to occur and should be masked. In this article, we present asynchronous QDI majority voter designs for QMR and state which are preferable from cycle time (i.e., speed), area, power, and energy perspectives. Towards this, we implemented example QMR circuits in a robust QDI asynchronous design style by employing a delay insensitive dual rail code for data encoding and adopting four-phase handshake protocols for data communication. Based on physical implementations using a 32/28nm CMOS process, we find that our proposed QMR majority voter achieves improved optimization in speed and energy.


Computers ◽  
2019 ◽  
Vol 8 (1) ◽  
pp. 10 ◽  
Author(s):  
Jaytrilok Choudhary ◽  
Padmanabhan Balasubramanian ◽  
Danny Varghese ◽  
Dhirendra Singh ◽  
Douglas Maskell

Mission- and safety-critical circuits and systems employ redundancy in their designs to overcome any faults or failures of constituent circuits and systems during the normal operation. In this aspect, the N-modular redundancy (NMR) is widely used. An NMR system is comprised of N identical systems, the corresponding outputs of which are majority voted to generate the system outputs. To perform majority voting, a majority voter is required, and the sizes of majority voters tend to vary depending on an NMR system. Majority voters corresponding to NMR systems are physically realized by enumerating the majority input clauses corresponding to an NMR system and then synthesizing the majority logic equation. The issue is that the number of majority input clauses corresponding to an NMR system is governed by a mathematical combination, the complexity of which increases substantially with increases in the level of redundancy. In this context, the design of a majority voter of any size corresponding to an NMR specification based on a new, generalized design approach is described. The proposed approach is inherently hierarchical and progressive since any NMR majority voter can be constructed from an (N − 2)MR majority voter along with additional logic corresponding to the two extra inputs. Further, the proposed approach paves the way for simultaneous production of the NMR system outputs corresponding to different degrees of redundancy, which is not intrinsic to the existing methods. This feature is additionally useful for any sharing of common logic with diverse degrees of redundancy in appropriate portions of an NMR implementation.


2021 ◽  
Vol 11 (2) ◽  
pp. 2249-2259
Author(s):  
Dr. Joseph Anthony Prathap ◽  
Maruthi Pottella ◽  
Srikanth Thammisetti ◽  
Sainath Rachakonda

This paper proposes the Triple Modular Redundancy checker for the Hybrid Digital Pulse Width Modulation generator to verify the correctness in the output signal. The proposed design involves replicating the Hybrid Digital Pulse Width Modulation Generator thrice and the majority voter circuit validates the correct output by considering the two accurate signals out of the three outputs. The digital pulse width modulation generator is broadly classified as Counter-based Digital Pulse Width Modulation, Delay line-based Digital Pulse Width Modulation, and Hybrid-based Digital Pulse Width Modulation. Among the three methods, the Hybrid based Digital Pulse Width Modulation is preferred as the Counter-based Digital Pulse Width Modulation uses high clocking frequency and the Delay line-based Digital Pulse Width Modulation occupies a large area. The proposed Triple Modular Redundancy is implemented using the FPGA and parameters such as power analysis and device utilization chart.


Sensors ◽  
2020 ◽  
Vol 20 (24) ◽  
pp. 7334
Author(s):  
Seongwoog Oh ◽  
Jungsuek Oh

This paper proposes a novel design for a chip-on-probe with the aim of overcoming the heat dissipation effect during brain stimulations using modulated microwave signals. The temperature of the stimulus chip during normal operation is generally 40 °C–60 °C, which is sufficient to cause unintended temperature effects during stimulation. This effect is particularly fatal in brain stimulation applications that require repeated stimulation. This paper proposes, for the first time, a topology that vertically separates the stimulus chip generating the stimulus signal and the probe delivering the signal into the brain to suppress the heat transfer while simultaneously minimizing the radio frequency (RF) transmission loss. As the proposed chip-on-probe should be attached to the head of a small animal, an auxiliary board with a heat sink was carefully designed considering the weight that does not affect the behavior experiment. When the transition structures are properly designed, a heat sink can be mounted to maximize the cooling effect, reducing the temperature by more than 13 °C in a simulation when the heat generated by the chip is transferred to the brain, while the transition from the chip to the probe experiences a loss of 1.2 dB. Finally, the effectiveness of the proposed design is demonstrated by fabricating a chip with the 0.28 μm silicon-on-insulator (SOI) complementary metal–oxide–semiconductor (CMOS) process and a probe with a RT6010 printed-circuit board (PCB), showing a temperature reduction of 49.8 °C with a maximum output power of 11 dBm. In the proposed chip-on-probe device, the temperature formed in the area in contact with the brain is measured at 31.1 °C.


Author(s):  
HYEON SOO KIM ◽  
YONG RAE KWON ◽  
IN SANG CHUNG

Software restructuring is recognized as a promising method to improve logical structure and understandability of a software system which is composed of modules with loosely-coupled elements. In this paper, we present methods of restructuring an ill-structured module at the software maintenance phase. The methods identify modules performing multiple functions and restructure such modules. For identifying the multi-function modules, the notion of the tightly-coupled module that performs a single specific function is formalized. This method utilizes information on data and control dependence, and applies program slicing to carry out the task of extracting the tightly-coupled modules from the multi-function module. The identified multi-function module is restructured into a number of functional strength modules or an informational strength module. The module strength is used as a criterion to decide how to restructure. The proposed methods can be readily automated and incorporated in a software tool.


Author(s):  
Cornel Tarabasanu Mihaila ◽  
Lavinia G. Hinescu ◽  
Cristian Boscornea ◽  
Carmen Moldovan ◽  
Mihai E. Hinescu

The paper presents the synthetic routes for obtaining some organic semiconductors and their characterization in order to use in thin film deposition for gas sensing devices. An original technique was used to control the molecular weight of polymeric phthalocyanine. We have fabricated devices consisting of evaporated thin films of copper, nickel, and iron phthalocyanines onto interdigital electrodes and estimated the electrical conductivity by in-situ measurements. The films were evaporated onto substrates (gold or aluminum) which were entirely integrated in the standard CMOS (capacitor metal oxide semiconductor) technology. The objectives of this work were to improve the synthesis methods of organic metal-complex tetraizoindoles and their polymers and to evaluate their electrical response and thermal stability as evaporated thin films. We have also investigated the variation of polymers conductivity and sublimation yield with the average molecular weight. We found that for polymeric phthalocyanines, the thermal stability was higher than for Pcs monomers. The stability of polymers increased with the average molecular weight.


2021 ◽  
Author(s):  
Sheldon Mark Foulds

Over the last few years evolution in electronics technology has led to the shrinkage of electronic circuits. While this has led to the emergence of more powerful computing systems it has also caused a dramatic increase in the occurrence of soft errors and a steady climb in failure in time (FIT) rates. This problem is most prevalent in FPGA based systems which are highly susceptible to radiation induced errors. Depending upon the severity of the problem a number of methods exist to counter these effects including Triple Modular Redundancy (TMR), Error Control Coding (ECC), scrubbing systems etc. The following project presents a simulation of an FPGA based system that employs one of the popular error control code techniques called the Hamming Code. A resulting analysis shows that Hamming Code is able to mitigate the effects of single event upsets (SEUs) but suffers due to a number of limitations.


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