scholarly journals A Novel Independently Biased 3-Stack GaN HEMT Configuration for Efficient Design of Microwave Amplifiers

2019 ◽  
Vol 9 (7) ◽  
pp. 1510
Author(s):  
Huy Hoang Nguyen ◽  
Duy Manh Luong ◽  
Gia Duong Bach
Keyword(s):  
Mobile Communications ◽  
Communication Systems ◽  
Noise Figure ◽  
Satellite Communications ◽  
Low Noise ◽  
Superior Performance ◽  
High Electron ◽  
Power Gain ◽  
Efficient Design ◽  
Lna Design

The power amplifier (PA) and low-noise amplifier (LNA) are the most critical components of transceiver systems including radar, mobile communications, satellite communications, etc. While the PA is the key component of the transmitter (TX), the LNA is the key component of the receiver (RX) of the transceiver system. It is pointed out that traditional design approaches for both the LNA and PA face challenging drawbacks. When designing an LNA, the power gain and noise figure of the LNA are difficult to improve simultaneously. For PA design, it indicates that efficiency and linearity of the PA are also hard to improve simultaneously. This study aims to surmount this by proposing a novel independently biased 3-stack GaN high-electron-mobility transistor (HEMT) configuration for efficient design of both PA and LNA for next generation wireless communication systems. By employing an independently biased technique, the proposed configuration can offer superior performance at both small-signal (SS) for LNA design and large-signal (LS) for PA design compared with other typical circuit configurations. Simulation results show that by utilizing an adaptive bias control of each transistor of the proposed configuration, both power gain and noise figure can be improved simultaneously for the LNA design. Moreover, efficiency and linearity can be also improved at the same time for the PA design. Compared results with other typical configurations including a single-stage, conventional cascode, independently biased cascode, and conventional 3-stack reveals that the proposed configuration exhibits superior advantages at both SS and LS operation.

Materials and Device Characteristics of InAlAs/InGaAs HEMTs

1992 ◽  
Vol 281 ◽  
Author(s):  
Pin Ho ◽  
M. Y. Kao ◽  
P. C. Chao ◽  
K. H. G. Duh ◽  
P. M. Smith ◽  
...  
Keyword(s):  
Power Density ◽  
Output Power ◽  
Electron Mobility ◽  
Noise Figure ◽  
Low Noise ◽  
Maximum Output ◽  
High Electron ◽  
60 Ghz ◽  
Power Gain ◽  
Power Added Efficiency

ABSTRACTHigh electron mobility transistors (HEMTs) based on the InAlAs/InGaAs heterostructure have been grown on InP by molecular beam epitaxy. At room temperature, typical sheet charge densities of 2.1–3.0×1012 cm−2 and Hall electron mobilities over 10000 cm2 /V-s are obtained. An electron mobility as high as 13000 cm2 /V-s is achieved with a pseudomorphic Iny Ga1−y As channel and a y value of 0.70.HEMTs with a T- or Γ-shaped gate and with gate lengths ranging from 0.1–0.25 urn have been fabricated. A record low noise figure of 0.7 dB with an associated gain of 8.6 dB at 62 GHz has been achieved with 0.1 μm Γ-gate devices, while T-gate devices exhibit a minimum noise figure of 1.2 dB with 7.2 dB associated gain at 94 GHz. Separately, a record fmax value of 455 GHz was determined by extrapolating at -6 dB/octave from the measured gain of 13.6 dB at 95 GHz.Power HEMTs using a double heterojunction structure exhibit a record peak power-added efficiency (P.A.E.) of 49% with 8.6 dB power gain and 0.30 W/mm power density measured at 60 GHz. When biased and tuned for maximum output power, our best 60 GHz output power density to date is 0.52 W/mm with 33% P.A.E. and 5.9 dB power gain using a single heterojunction HEMT scheme with pseudomorphic channel. A similar device also yields peak P.A.E. of 26% with 0.20 W/mm power density and 4.9 dB gain at 94 GHz. These results represent the highest P.A.E.S and power gains ever reported for any transistor at these frequencies.

scholarly journals UWB-MMIC Matrix Distributed Low Noise Amplifier

Proceedings ◽  
2020 ◽  
Vol 63 (1) ◽  
pp. 52
Author(s):  
Moustapha El Bakkali ◽  
Said Elkhaldi ◽  
Intissar Hamzi ◽  
Abdelhafid Marroun ◽  
Naima Amar Touhami
Keyword(s):  
Noise Figure ◽  
Supply Voltage ◽  
Average Power ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Ultra Wideband ◽  
Design System ◽  
High Electron ◽  
Power Gain ◽  
Noise Amplifier

In this paper, a 3.1–11 GHz ultra-wideband low noise amplifier with low noise figure, high power gain S21, low reverse gain S12, and high linearity using the OMMIC ED02AH process, which employs a 0.18 μm Pseudomorphic High Electron Mobility Transistor is presented. This Low Noise Amplifier (LNA) was designed with the Advanced Design System simulator in distributed matrix architecture. For the low noise amplifier, four stages were used obtaining a good input/output matching. An average power gain S21 of 11.6 dB with a gain ripple of ±0.6 dB and excellent noise figure of 3.55 to 4.25 dB is obtained in required band with a power dissipation of 48 mW under a supply voltage of 2 V. The input compression point 1 dB and third-order input intercept point are −1.5 and 23 dBm respectively. The core layout size is 1.8 × 1.2 mm2.

High-performance 60 GHz MMICs for wireless digital communication in 100 nm mHEMT technology

2011 ◽  
Vol 3 (2) ◽  
pp. 107-113 ◽  
Author(s):  
Daniel Lopez-Diaz ◽  
Ingmar Kallfass ◽  
Axel Tessmann ◽  
Rainer Weber ◽  
Hermann Massler ◽  
...  
Keyword(s):  
Noise Figure ◽  
Data Communication ◽  
Building Blocks ◽  
Low Noise ◽  
Oxide Semiconductor ◽  
Superior Performance ◽  
High Electron ◽  
60 Ghz ◽  
Single Chip ◽  
Integrated Antenna

Wireless data communication is pushing towards 60 GHz and will most likely be served by SiGe and Complementary Metal Oxide Semiconductor (CMOS) technologies in the consumer market. Nevertheless, some applications are imposing superior performance requirements on the analog frontend, and employing III-V compound semiconductors can provide significant advantages with respect to transmitter power and noise figure. In this paper, we present essential building blocks and a novel single-chip low complexity transceiver Monolithic Microwave Integrated Circuit (MMIC) with integrated antenna switches for 60 GHz communication, fabricated in a 100 nm metamorphic high electron mobility transistor (mHEMT) technology. This technology features a measured noise figure of <2.5 dB in low-noise amplifiers at 60 GHz and the realized medium power amplifiers achieve more than 20 dBm saturated output power. Integrated antenna switches with an insertion loss of less than 1.5 dB enable the integration of the transmit and the receive stages on a single chip. A single-chip transceiver with external subharmonic Local Oscillator (LO) supply for its I/Q down- and up-converter achieves a linear conversion gain in both, the Transmit (Tx) and the Receive (Rx) paths, of more than 10 dB.

Design of Broadband LNA Using Improved Self-Bias Architecture

2019 ◽  
Vol 28 (08) ◽  
pp. 1920005 ◽  
Author(s):  
Tian Qi ◽  
Songbai He
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Power Gain ◽  
Matching Networks ◽  
Self Bias ◽  
Measurement Results ◽  
Chip Size ◽  
Simulation Results ◽  
Noise Amplifier ◽  
Ku Band

A broadband low-noise amplifier (LNA) using 0.13 [Formula: see text]m GaAs HEMT technology for Ku-band applications is presented in this paper. By introducing an improved self-bias architecture, the LNA is achieved with low noise figure (NF) and high power gain. Compared with traditional LNA, self-bias architecture can reduce DC supplies to single one, and the improved architecture proposed here also takes part in source matching to reduce the complexity matching networks for broadband applications. To verify, an LNA operating over 12–18-GHz bandwidth is fabricated. The measurement results, for all the 72 chips on the wafer, and their average values are in great accordance with the simulation results, with 25.5–27.5-dB power gain, 1.1–1.8-dB NF, 15–17.5-dBm output power at [Formula: see text] and with a chip size of 2 mm [Formula: see text] 1.5 mm.

Design Analysis of Inductorless Active Loaded Low Power UWB LNA Using Noise Cancellation Technique

Frequenz ◽  
2020 ◽  
Vol 74 (3-4) ◽  
pp. 137-144 ◽  
Author(s):  
Dheeraj Kalra ◽  
Manish Kumar ◽  
Aasheesh Shukla ◽  
Laxman Singh ◽  
Zainul Abdin Jaffery
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Broad Band ◽  
Wide Band ◽  
Cmos Technology ◽  
Noise Cancellation ◽  
Low Noise ◽  
Design Analysis ◽  
Common Source ◽  
Power Gain

AbstractThis paper includes a design analysis of an inductorless low-power (LP) low-noise amplifier (LNA) with active load for Ultra Wide Band (UWB) applications. The proposed LNA consists of two parallel paths, one is the common source (CS) path and second is the CG path. The CG path has the edge advantage of improving overall Noise figure (NF) due to wide band impedance matching in UWB, while the CS path provides high power gain. A method for noise cancellation is adopted, to reduce the noise of CS path with the help of CG path. The proposed LNA successfully simulated in 90 nm CMOS technology. The results of proposed work indicate optimization at frequency 5.70 GHz with 3 dB bandwidth of 4.3 GHz–8.9 GHz. All simulations have been done for a range of frequency 03 GHz–13 GHz in Cadence virtuoso software. The results quoted 1.15 dB NF, −18.12 dB S11, 13.7 dB S21, maximum operating power gain (GP) 11.756 dB at frequency 5.7 GHz and available power gain (GA) is 10.17 dB at frequency 8.61 GHz, with 0.6 V, 0.92 mW broad band LNA.

MODELING OF NOISE BEHAVIOR OF GRADED BAND GAP CHANNEL MOSFET AT GHz FREQUENCIES

2007 ◽  
Vol 07 (04) ◽  
pp. L507-L517
Author(s):  
ALI ABOU-ELNOUR ◽  
OSSAMA ABO-ELNOR ◽  
HAMDY ABDELHAMEED ◽  
ADEL EL-HENAWY
Keyword(s):  
Band Gap ◽  
High Frequency ◽  
Noise Figure ◽  
Low Noise ◽  
Noise Model ◽  
Superior Performance ◽  
Model Parameters ◽  
Short Channel ◽  
Suggested Structure ◽  
Graded Band Gap

A novel graded band gap channel Si - SiGe MOSFET structure has been suggested and its characteristics have been investigated. The investigations indicated that the suggested structure reduces the short-channel effects, increases the cut-off frequency, and hence makes its usage at high frequency and Low noise applications possible. To show the superior performance of the suggested structure at GHz frequencies, and as an example, the noise behavior of the structure is determined. First the device noise model parameters are calculated from D.C. and A.C. characteristics. The extracted noise model parameters are then used to determine the minimum noise figure at GHz frequencies. The effects of the different device parameters on the noise performance are determined. Finally, the results are compared with those of conventional MOSFET structure to show the superior performance of graded band gap Si - SiGe MOSFETs at high frequency ranges.

scholarly journals Design of a Linear LNA for 5G Applications using 45 nm Technology

2021 ◽  
Vol 20 ◽  
pp. 128-132
Author(s):  
Rashmi Hazarika ◽  
Manash Pratim Sharma
Keyword(s):  
Communication Systems ◽  
Noise Figure ◽  
Low Noise ◽  
Active Inductor ◽  
Output Stage ◽  
Common Gate ◽  
Noise Amplifier ◽  
Cost Efficient ◽  
The Stability ◽  
Gate Input

A low noise amplifier (LNA) plays a very significant role in communication systems. Despite having a good amplification of the signal it must offer other attributes like noise figure, linearity etc for making the communication system more robust. With the advent of 5G communication, the requirement of a high BW LNA is becoming important. This paper presents the design of a LNA which have a common gate input configuration, an active inductor in place of a passive inductor, common drain amplifier at the output stage and a linearity circuit. Common gate amplifier offers a good voltage amplification while the common drain stage enhances the stability. The active inductor facilitates reduction of the die area paving the way for a cost efficient structure. This proposed design achieves a gain of 15.17dB with substantial enhancement of linearity. A good noise figure of 7dB is obtained while using 11 transistors and eliminating the need of passive inductors. The peak gain is achieved at 3.5GHz

scholarly journals A Strategic Review on Growth of InP on Silicon Substrate for Applications in High Frequency RF Devices

2012 ◽  
pp. 51-56
Author(s):  
Umesh.P. Gomes ◽  
Mr. Kuldeep ◽  
S. Rathi ◽  
Dhrubes Biswas
Keyword(s):  
High Frequency ◽  
Lattice Mismatch ◽  
Low Cost ◽  
High Electron Mobility Transistors ◽  
Low Noise ◽  
Superior Performance ◽  
High Electron ◽  
Electron Mobility Transistors ◽  
Strategic Review ◽  
Rf Devices

A review is presented on the advances in InAlAs/InGaAs High Electron Mobility transistors (HEMT) on silicon substrates for high frequency and low noise applications. Although InAlAs/InGaAs HEMTs on InP and GaAs substrates have been much appreciated due to their superior performance, their widespread applications have been hindered due to higher cost of the substrates. Silicon has been used as an alternative substrate considering the benefits of low cost, technological maturity and integration of III-V and silicon technology inspite of the constraints like lattice mismatch and large difference in thermal expansion coefficient.

scholarly journals Design And Analysis Of CMOS Low Noise Amplifier Circuit For 5-GHz Cascode and Folded Cascode In 180nm Technology

2018 ◽  
Vol 7 (3) ◽  
pp. 143
Author(s):  
T. Kanthi ◽  
D. Sharath Babu Rao
Keyword(s):  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Common Source ◽  
Power Gain ◽  
Amplifier Circuit ◽  
Folded Cascode ◽  
Noise Amplifier ◽  
5 Ghz

This paper is about Low noise amplifier topologies based on 0.18µm CMOS technology. A common source stage with inductive degeneration, cascode stage and folded cascode stage is designed, simulated and the performance has been analyzed. The LNA’s are designed in 5GHz. The LNA of cascode stage of noise figure (NF) 2.044dB and power gain 4.347 is achieved. The simulations are done in cadence virtuoso spectre RF.

scholarly journals GaN low-noise X-band MMIC amplifier.

2021 ◽  
Vol 2021 (2) ◽  
Author(s):  
E. Kudabay ◽  
◽  
A. Salikh ◽  
V.A. Moseichuk ◽  
A. Krivtsun ◽  
...  
Keyword(s):  
Output Power ◽  
Integrated Circuit ◽  
Noise Figure ◽  
Supply Voltage ◽  
High Electron Mobility Transistor ◽  
Low Noise ◽  
Common Source ◽  
High Electron ◽  
Monolithic Integrated Circuit ◽  
X Band

The purpose of this paper is to design a microwave monolithic integrated circuit (MMIC) for low noise amplifier (LNA) X-band (7-12 GHz) based on technology of gallium nitride (GaN) high electron mobility transistor (HEMT) with a T-gate, which has 100 nm width, on a silicon (Si) semi-insulating substrate of the OMMIC company. The amplifier is based on common-source transistors with series feedback, which was formed by high-impedance transmission line, and with parallel feedback to match noise figure and power gain. The key characteristics of an LNA are noise figure and gain. However, in this paper, it was decided to design the LNA, which should have a good margin in terms of input and output power. As a result, GaN technology was chosen, which has a higher noise figure compared to other technologies, but eliminates the need for an input power limiter, which in turn significantly increases the overall noise figure. As a result LNA MMIC was developed with the following characteristics: noise figure less than 1.6 dB, small-signal gain more than 20 dB, return loss better than -13 dB and output power more than 19 dBm with 1 dB compression in the range from 7 to 12 GHz in dimensions 2x1.5 mm², which has a supply voltage of 8 V and a current consumption of less than 70 mA. However, it should be said that LNA was only modeled in the AWR DE.

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