Materials and Device Characteristics of InAlAs/InGaAs HEMTs

1992 ◽  
Vol 281 ◽  
Author(s):  
Pin Ho ◽  
M. Y. Kao ◽  
P. C. Chao ◽  
K. H. G. Duh ◽  
P. M. Smith ◽  
...  

ABSTRACTHigh electron mobility transistors (HEMTs) based on the InAlAs/InGaAs heterostructure have been grown on InP by molecular beam epitaxy. At room temperature, typical sheet charge densities of 2.1–3.0×1012 cm−2 and Hall electron mobilities over 10000 cm2 /V-s are obtained. An electron mobility as high as 13000 cm2 /V-s is achieved with a pseudomorphic Iny Ga1−y As channel and a y value of 0.70.HEMTs with a T- or Γ-shaped gate and with gate lengths ranging from 0.1–0.25 urn have been fabricated. A record low noise figure of 0.7 dB with an associated gain of 8.6 dB at 62 GHz has been achieved with 0.1 μm Γ-gate devices, while T-gate devices exhibit a minimum noise figure of 1.2 dB with 7.2 dB associated gain at 94 GHz. Separately, a record fmax value of 455 GHz was determined by extrapolating at -6 dB/octave from the measured gain of 13.6 dB at 95 GHz.Power HEMTs using a double heterojunction structure exhibit a record peak power-added efficiency (P.A.E.) of 49% with 8.6 dB power gain and 0.30 W/mm power density measured at 60 GHz. When biased and tuned for maximum output power, our best 60 GHz output power density to date is 0.52 W/mm with 33% P.A.E. and 5.9 dB power gain using a single heterojunction HEMT scheme with pseudomorphic channel. A similar device also yields peak P.A.E. of 26% with 0.20 W/mm power density and 4.9 dB gain at 94 GHz. These results represent the highest P.A.E.S and power gains ever reported for any transistor at these frequencies.

2021 ◽  
Vol 11 (19) ◽  
pp. 9017
Author(s):  
Jinho Jeong ◽  
Yeongmin Jang ◽  
Jongyoun Kim ◽  
Sosu Kim ◽  
Wansik Kim

In this paper, a high-power amplifier integrated circuit (IC) in gallium-nitride (GaN) on silicon (Si) technology is presented at a W-band (75–110 GHz). In order to mitigate the losses caused by relatively high loss tangent of Si substrate compared to silicon carbide (SiC), low-impedance microstrip lines (20–30 Ω) are adopted in the impedance matching networks. They allow for the impedance transformation between 50 Ω and very low impedances of the wide-gate transistors used for high power generation. Each stage is matched to produce enough power to drive the next stage. A Lange coupler is employed to combine two three-stage common source amplifiers, providing high output power and good input/output return loss. The designed power amplifier IC was fabricated in the commercially available 60 nm GaN-on-Si high electron mobility transistor (HEMT) foundry. From on-wafer probe measurements, it exhibits the output power higher than 26.5 dBm and power added efficiency (PAE) higher than 8.5% from 88 to 93 GHz with a large-signal gain > 10.5 dB. Peak output power is measured to be 28.9 dBm with a PAE of 13.3% and a gain of 9.9 dB at 90 GHz, which corresponds to the power density of 1.94 W/mm. To the best of the authors’ knowledge, this result belongs to the highest output power and power density among the reported power amplifier ICs in GaN-on-Si HEMT technologies operating at the W-band.


2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Premmilaah Gunasegaran ◽  
Jagadheswaran Rajendran ◽  
Selvakumar Mariappan ◽  
Yusman Mohd Yusof ◽  
Zulfiqar Ali Abdul Aziz ◽  
...  

Purpose The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA). Design/methodology/approach The linearization mechanism is executed with an aid of a passive linearizer implemented at the gate of the main amplifier to minimize the effect of Cgs capacitance through the generation of opposite phase response at the main amplifier. The inductor-less output matching network presents an almost lossless output matching network which contributes to high gain, PAE and output power. The linearity performance is improved without the penalty of power consumption, power gain and stability. Findings With this topology, the PA delivers more than 20 dB gain for the Bluetooth Low Energy (BLE) Band from 2.4 GHz to 2.5 GHz with a supply headroom of 1.8 V. At the center frequency of 2.45 GHz, the PA exhibits a gain of 23.3 dB with corresponding peak PAE of 40.11% at a maximum output power of 14.3 dBm. At a maximum linear output power of 12.7 dBm, a PAE of 37.3% has been achieved with a peak third order intermodulation product of 28.04 dBm with a power consumption of 50.58 mW. This corresponds to ACLR of – 20 dBc, thus qualifying the PA to operate for BLE operation. Practical implications The proposed technique is able to boost up the efficiency and output power, as well as linearize the PA closer to 1 dB compression point. This reduces the trade-off between linear output power and PAE in CMOS PA design. Originality/value The proposed CMOS PA can be integrated comfortably to a BLE transmitter, allowing it to reduce the transceiver’s overall power consumption.


2007 ◽  
Vol 556-557 ◽  
pp. 763-766 ◽  
Author(s):  
Jeong Hyuk Yim ◽  
Ho Keun Song ◽  
Jeong Hyun Moon ◽  
Han Seok Seo ◽  
Jong Ho Lee ◽  
...  

Planar MESFETs were fabricated on high-purity semi-insulating (HPSI) 4H-SiC substrates. The saturation drain current of the fabricated MESFETs with a gate length of 0.5 μm and a gate width of 100 μm was 430 mA/mm, and the transconductance was 25 mS/mm. The maximum oscillation frequency and cut-off frequency were 26.4 GHz and 7.2 GHz, respectively. The power gain was 8.4 dB and the maximum output power density was 2.8 W/mm for operation of class A at CW 2 GHz. MESFETs on HPSI substrates showed no current instability and much higher output power density in comparison to MESFETs on vanadium-doped SI substrates.


2021 ◽  
Vol 2021 (2) ◽  
Author(s):  
E. Kudabay ◽  
◽  
A. Salikh ◽  
V.A. Moseichuk ◽  
A. Krivtsun ◽  
...  

The purpose of this paper is to design a microwave monolithic integrated circuit (MMIC) for low noise amplifier (LNA) X-band (7-12 GHz) based on technology of gallium nitride (GaN) high electron mobility transistor (HEMT) with a T-gate, which has 100 nm width, on a silicon (Si) semi-insulating substrate of the OMMIC company. The amplifier is based on common-source transistors with series feedback, which was formed by high-impedance transmission line, and with parallel feedback to match noise figure and power gain. The key characteristics of an LNA are noise figure and gain. However, in this paper, it was decided to design the LNA, which should have a good margin in terms of input and output power. As a result, GaN technology was chosen, which has a higher noise figure compared to other technologies, but eliminates the need for an input power limiter, which in turn significantly increases the overall noise figure. As a result LNA MMIC was developed with the following characteristics: noise figure less than 1.6 dB, small-signal gain more than 20 dB, return loss better than -13 dB and output power more than 19 dBm with 1 dB compression in the range from 7 to 12 GHz in dimensions 2x1.5 mm², which has a supply voltage of 8 V and a current consumption of less than 70 mA. However, it should be said that LNA was only modeled in the AWR DE.


2021 ◽  
Vol 42 (12) ◽  
pp. 122802
Author(s):  
Quan Wang ◽  
Changxi Chen ◽  
Wei Li ◽  
Yanbin Qin ◽  
Lijuan Jiang ◽  
...  

Abstract State-of-the-art AlGaN/GaN high electron mobility structures were grown on semi-insulating 4H-SiC substrates by MOCVD and X-band microwave power high electron mobility transistors were fabricated and characterized. Hall mobility of 2291.1 cm2/(V·s) and two-dimensional electron gas density of 9.954 × 1012 cm–2 were achieved at 300 K. The HEMT devices with a 0.45-μm gate length exhibited maximum drain current density as high as 1039.6 mA/mm and peak extrinsic transconductance of 229.7 mS/mm. The f T of 30.89 GHz and f max of 38.71 GHz were measured on the device. Load-pull measurements were performed and analyzed under (–3.5, 28) V, (–3.5, 34) V and (–3.5, 40) V gate/drain direct current bias in class-AB, respectively. The uncooled device showed high linear power gain of 17.04 dB and high power-added efficiency of 50.56% at 8 GHz when drain biased at (–3.5, 28) V. In addition, when drain biased at (–3.5, 40) V, the device exhibited a saturation output power density up to 6.21 W/mm at 8 GHz, with a power gain of 11.94 dB and a power-added efficiency of 39.56%. Furthermore, the low f max/f T ratio and the variation of the power sweep of the device at 8 GHz with drain bias voltage were analyzed.


Proceedings ◽  
2020 ◽  
Vol 63 (1) ◽  
pp. 52
Author(s):  
Moustapha El Bakkali ◽  
Said Elkhaldi ◽  
Intissar Hamzi ◽  
Abdelhafid Marroun ◽  
Naima Amar Touhami

In this paper, a 3.1–11 GHz ultra-wideband low noise amplifier with low noise figure, high power gain S21, low reverse gain S12, and high linearity using the OMMIC ED02AH process, which employs a 0.18 μm Pseudomorphic High Electron Mobility Transistor is presented. This Low Noise Amplifier (LNA) was designed with the Advanced Design System simulator in distributed matrix architecture. For the low noise amplifier, four stages were used obtaining a good input/output matching. An average power gain S21 of 11.6 dB with a gain ripple of ±0.6 dB and excellent noise figure of 3.55 to 4.25 dB is obtained in required band with a power dissipation of 48 mW under a supply voltage of 2 V. The input compression point 1 dB and third-order input intercept point are −1.5 and 23 dBm respectively. The core layout size is 1.8 × 1.2 mm2.


1986 ◽  
Vol 22 (12) ◽  
pp. 647 ◽  
Author(s):  
K.H.G. Duh ◽  
P.C. Chao ◽  
P.M. Smith ◽  
L.F. Lester ◽  
B.R. Lee

2011 ◽  
Vol 3 (2) ◽  
pp. 107-113 ◽  
Author(s):  
Daniel Lopez-Diaz ◽  
Ingmar Kallfass ◽  
Axel Tessmann ◽  
Rainer Weber ◽  
Hermann Massler ◽  
...  

Wireless data communication is pushing towards 60 GHz and will most likely be served by SiGe and Complementary Metal Oxide Semiconductor (CMOS) technologies in the consumer market. Nevertheless, some applications are imposing superior performance requirements on the analog frontend, and employing III-V compound semiconductors can provide significant advantages with respect to transmitter power and noise figure. In this paper, we present essential building blocks and a novel single-chip low complexity transceiver Monolithic Microwave Integrated Circuit (MMIC) with integrated antenna switches for 60 GHz communication, fabricated in a 100 nm metamorphic high electron mobility transistor (mHEMT) technology. This technology features a measured noise figure of <2.5 dB in low-noise amplifiers at 60 GHz and the realized medium power amplifiers achieve more than 20 dBm saturated output power. Integrated antenna switches with an insertion loss of less than 1.5 dB enable the integration of the transmit and the receive stages on a single chip. A single-chip transceiver with external subharmonic Local Oscillator (LO) supply for its I/Q down- and up-converter achieves a linear conversion gain in both, the Transmit (Tx) and the Receive (Rx) paths, of more than 10 dB.


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