scholarly journals Fault Localization by Comparing Memory Updates between Unit and Integration Testing of Automotive Software in an Hardware-in-the-Loop Environment

2018 ◽  
Vol 8 (11) ◽  
pp. 2260 ◽  
Author(s):  
Ki-Yong Choi ◽  
Jung-Won Lee
Keyword(s):  
Electronic Control Unit ◽  
Seat Belt ◽  
Source Code ◽  
Fault Localization ◽  
Normal Operation ◽  
Memory Usage ◽  
Hardware In The Loop ◽  
Unit Test ◽  
Automotive Software ◽  
Integration Test

During the inspection stage, an integration test is performed on electronic automobile parts that have passed a unit test. The faults found during this test are reported to the developer, who subsequently modifies the source code. If the tester provides the developer with memory usage information (such as functional symbol or interface signal), which works differently from normal operation in failed Hardware-in-the-Loop (HiL) testing (even when the tester has no source code), that information will be useful for debugging. In this paper, we propose a fault localization method for automotive software in an HiL environment by comparing the analysis results of updated memory between units and integration tests. Analyzing the memory usage of a normally operates unit test, makes it possible to obtain memory-updated information necessary for the operation of that particular function. By comparing this information to the memory usage when a fault occurs during an integration test, erroneously operated symbols and stored values are presented as potential root causes of the fault. We applied the proposed method to HiL testing for an OSEK/VDX-based electronic control unit (ECU). As a result of testing using fault injection, we confirmed that the fault causes can be found by checking the localized memory symbols with an average of 5.77%. In addition, when applying this methodology to a failure that occurred during a body control module (BCM) (which provides seat belt warnings) test, we could identify a suspicious symbol and find the cause of the test failure with only 8.54% of localized memory symbols.

scholarly journals CNN-Based Fault Localization Method Using Memory-Updated Patterns for Integration Test in an HiL Environment

2019 ◽  
Vol 9 (14) ◽  
pp. 2799
Author(s):  
Ki-Yong Choi ◽  
Jung-Won Lee
Keyword(s):  
Pattern Mining ◽  
Electronic Control Unit ◽  
Fault Localization ◽  
Control Unit ◽  
Normal Pattern ◽  
Localization Method ◽  
Iso 26262 ◽  
Memory Address ◽  
Starting Point ◽  
Integration Test

Automotive electronic components are tested via hardware-in-the-loop (HiL) testing at the unit and integration test stages, according to ISO 26262. It is difficult to obtain debugging information from the HiL test because the simulator runs a black-box test automatically, depending on the scenario in the test script. At this time, debugging information can be obtained in HiL tests, using memory-updated information, without the source code or the debugging tool. However, this method does not know when the fault occurred, and it is difficult to select the starting point of debugging if the execution flow of the software is not known. In this paper, we propose a fault-localization method using a pattern in which each memory address is updated in the HiL test. Via a sequential pattern-mining algorithm in the memory-updated information of the transferred unit tests, memory-updated patterns are extracted, and the system learns using a convolutional neural network. Applying the learned pattern in the memory-updated information of the integration test can determine the fault point from the normal pattern. The point of departure from the normal pattern is highlighted as a fault-occurrence time, and updated addresses are presented as fault candidates. We applied the proposed method to an HiL test of an OSEK/VDX-based electronic control unit. Through fault-injection testing, we could find the cause of faults by checking the average memory address of 3.28%, and we could present the point of fault occurrence with an average accuracy of 80%.

scholarly journals Continuous Automotive Software Updates through Container Image Layers

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 739
Author(s):  
Nicholas Ayres ◽  
Lipika Deka ◽  
Daniel Paluszczyszyn
Keyword(s):  
Embedded System ◽  
Ad Hoc ◽  
New Technologies ◽  
Electronic Control Unit ◽  
Control Unit ◽  
New Approach ◽  
Automotive Software ◽  
Software Updating ◽  
Software Updates ◽  
Functional Software

The vehicle-embedded system also known as the electronic control unit (ECU) has transformed the humble motorcar, making it more efficient, environmentally friendly, and safer, but has led to a system which is highly dependent on software. As new technologies and features are included with each new vehicle model, the increased reliance on software will no doubt continue. It is an undeniable fact that all software contains bugs, errors, and potential vulnerabilities, which when discovered must be addressed in a timely manner, primarily through patching and updates, to preserve vehicle and occupant safety and integrity. However, current automotive software updating practices are ad hoc at best and often follow the same inefficient fix mechanisms associated with a physical component failure of return or recall. Increasing vehicle connectivity heralds the potential for over the air (OtA) software updates, but rigid ECU hardware design does not often facilitate or enable OtA updating. To address the associated issues regarding automotive ECU-based software updates, a new approach in how automotive software is deployed to the ECU is required. This paper presents how lightweight virtualisation technologies known as containers can promote efficient automotive ECU software updates. ECU functional software can be deployed to a container built from an associated image. Container images promote efficiency in download size and times through layer sharing, similar to ECU difference or delta flashing. Through containers, connectivity and OtA future software updates can be completed without inconveniences to the consumer or incurring expense to the manufacturer.

Component and Integration Test of an FPGA-Based PWR Protection Sub-System Using UVM

2017 ◽  
Author(s):  
Xuanxuan Shui ◽  
Yichun Wu ◽  
Junyi Zhou ◽  
Yuanfeng Cai
Keyword(s):  
Nuclear Power ◽  
Power Industry ◽  
Nuclear Power Industry ◽  
Normal Operation ◽  
Static Timing Analysis ◽  
Specific Test ◽  
Pressurized Water ◽  
Safety Margins ◽  
Integration Test ◽  
Test Process

Field programmable gate arrays (FPGAs) have drawn wide attention from nuclear power industry for digital instrument and control applications (DI&C), because it’s much easier and simpler than microprocessor-based applications, which makes it more reliable. FPGAs can also enhance safety margins of the plant with potential possibility for power upgrading at normal operation. For these reasons, more and more nuclear power corporations and research institutes are treating FPGA-based protection system as a technical alternative. As nuclear power industry requires high reliability and safety for DI&C Systems, the development method and process should be fully verified and validated. For this reason, to improve the application of FPGA in NPP I&C system, the specific test methods are critical for the developers and regulators. However, current international standards and research reports, like IEC 62566 and NUREG/CR-7006, which have demonstrated the life circle of the development of FPGA-based safety critical DI&C in NPPs, but the specific test requirements and methods which are significant to the developers are not provided. In this paper, the whole test process of a pressurized water reactor (PWR) protection sub-system (Primary Coolant Flow Low Protection, Over Temperature Delta T Protection, Over Power Delta T Protection) is described, including detail component and integration tests. The Universal Verification Methodology (UVM) based on System Verilog class libraries is applied to establish the verification test platform. All these tests are conducted in a simulation environment. The test process is driven by the test coverage which includes code coverages (i.e., Statement, Branch, Condition and Expression, Toggle, Finite State Machine) and function coverage. Specifically, Register Transaction Level (RTL) simulation is conducted for Component tests, while RTL simulation, Gate Level simulation, Timing simulation and Static timing analysis are conducted for the integration test. The issues (e.g., the floating point calculation, FPGA resource allocation and optimization) arose in the test process are also analyzed and discussed, which can be references for the developers in this area. The component and integration tests are part of the Verification and Validation (V&V) work, which should be done by the V&V team separated from the development team. The testing method could assure the test results reliable and authentic. It is practical and useful for the development and V&V of FPGA-based safety DI&C systems.

A New Hardware-in-the-Loop Test System for Electronic Control Unit of Dual-Clutch Transmission Vehicle

2012 ◽  
Vol 490-495 ◽  
pp. 13-18 ◽  
Author(s):  
Ran Chen ◽  
Lin Mi ◽  
Wei Tan
Keyword(s):  
Numerical Simulation ◽  
Electronic Control Unit ◽  
Control Unit ◽  
Test System ◽  
Testing System ◽  
Primary Concern ◽  
Hardware In The Loop ◽  
Electronic Control ◽  
Simulation Environment ◽  
Dual Clutch Transmission

Hardware-in-the-loop simulation (HILS) is a scheme that incorporates some hardware components of primary concern in the numerical simulation environment. This paper discusses the implementation and benefits of using the HIL testing system for electronic control unit of dual-clutch transmission (DCT) vehicle.

Automatic Source Code Generator Based on AUTOSAR RTE for Vehicular Applications

2009 ◽  
Author(s):  
Hyun Chul Jo ◽  
Shiquan Piao ◽  
Sung Ho Jin ◽  
Woo Young Jung
Keyword(s):  
Production Cost ◽  
Source Code ◽  
Limited Resources ◽  
Code Generator ◽  
New Approach ◽  
Automotive Software ◽  
Vehicle Systems ◽  
Experimental Process ◽  
Autosar Standard ◽  
Standard Concept

We propose a new approach to an automatic source code generator for the AUTOSAR-based vehicular software. The growing number of electrics/electronics software in vehicle systems makes more and more necessary the increasing demands. For example, it needs the essential requirements such as ensuring reliability, low production cost, coping with limited resources, and so on. Recently, there have been relative studies that point to this issue. An AUTOSAR development partnership is such a case. AUTOSAR is a standardized automotive software architecture which is an alliance of OEM and supplier. Now, the focus is mainly directed at a source code generator that deals with the AUTOSAR standard concept. In this paper, we present a novel source code generator which is based on the AUTOSAR software platform. The experimental process is presented to functionally verify the module, and structurally verify the generated source code.

Model-Based Design and Hardware-in-the-Loop Simulation of Engine Lean Operation

2014 ◽  
Author(s):  
Pushkar Agashe ◽  
Yang Li ◽  
Bo Chen
Keyword(s):  
Gasoline Engine ◽  
Control Strategies ◽  
Electronic Control Unit ◽  
Control Unit ◽  
Simulation Models ◽  
Operating Conditions ◽  
Hardware In The Loop ◽  
Vehicle Performance ◽  
Model Based ◽  
Hil Simulation

This paper presents model-based design and hardware-in-the-loop (HIL) simulation of engine lean operation. The functionalities of the homogeneous combustion subsystem in engine Electronic Control Unit (ECU) in dSPACE Automotive Simulation Models (ASM) are first analyzed. To control the gasoline engine in lean operation without the drop of output torque, the combustion subsystem in engine ECU is modified by introducing two control loops, torque modifier and fuel multiplier. The performance of these two controllers is evaluated by HIL simulation using a dSPACE HIL simulator. The HIL simulation models, including vehicle plant model and softECUs in HIL simulator and engine lean control model in hardware engine ECU are modeled using model-based design. With HIL simulation, the designed engine control strategies can be immediately tested to evaluate the overall vehicle performance. The HIL simulation results show that the designed lean combustion control strategy can reduce fuel consumption and is able to meet the torque requirement at lean engine operating conditions.

Automotive ECU Software Design Based on AUTOSAR

2014 ◽  
Vol 577 ◽  
pp. 1034-1037 ◽  
Author(s):  
Chun Jie Wang ◽  
Le Ge ◽  
Tian Yong Lee
Keyword(s):  
Software Development ◽  
Software Design ◽  
Development Process ◽  
Electronic Control Unit ◽  
Control Unit ◽  
Electronic Control ◽  
Software Development Process ◽  
Automotive Software ◽  
Development Tools ◽  
Development Methods

Aimed at the defects and deficiencies of traditional automotive ECU (Electronic Control Unit) development methods, AUTOSAR as a new standard for automotive software development makes the software development process simplified greatly. The existing AUTOSAR development tools are studied and compared in this article to analyze of their respective characteristics, and an ECU software design scheme of the system is summarized according to the methodology. The research results prove that AUTOSAR can raise the development efficiency and software portability.

Sign in / Sign up

Export Citation Format

Share Document