scholarly journals Epitaxial Graphene on 4H-SiC (0001) as a Versatile Platform for Materials Growth: Mini-Review

2021 ◽  
Vol 11 (13) ◽  
pp. 5784
Author(s):  
Ivan Shtepliuk ◽  
Filippo Giannazzo ◽  
Rositsa Yakimova
Keyword(s):  
Field Effect Transistors ◽  
Schottky Diodes ◽  
Compressive Strain ◽  
Atomic Layer ◽  
Epitaxial Graphene ◽  
Layer Deposition ◽  
N Doping ◽  
Pre Treatment ◽  
Precursor Molecules ◽  
Theoretical Results

Material growth on a dangling-bond-free interface such as graphene is a challenging technological task, which usually requires additional surface pre-treatment steps (functionalization, seed layer formation) to provide enough reactive sites. Being one of the most promising and adaptable graphene-family materials, epitaxial graphene on SiC, due to its internal features (substrate-induced n-doping, compressive strain, terrace-stepped morphology, bilayer graphene nano-inclusions), may provide pre-conditions for the enhanced binding affinity of environmental species, precursor molecules, and metal atoms on the topmost graphene layer. It makes it possible to use untreated pristine epitaxial graphene as a versatile platform for the deposition of metals and insulators. This mini-review encompasses relevant aspects of magnetron sputtering and electrodeposition of selected metals (Au, Ag, Pb, Hg, Cu, Li) and atomic layer deposition of insulating Al2O3 layers on epitaxial graphene on 4H-SiC, focusing on understanding growth mechanisms. Special deliberation has been given to the effect of the deposited materials on the epitaxial graphene quality. The generalization of the experimental and theoretical results presented here is hopefully an important step towards new electronic devices (chemiresistors, Schottky diodes, field-effect transistors) for environmental sensing, nano-plasmonics, and biomedical applications.

Electrical Characterization of Epitaxial Graphene Field-Effect Transistors with High-k Al2O3 Gate Dielectric Fabricated on SiC Substrates

2015 ◽  
Vol 821-823 ◽  
pp. 937-940 ◽  
Author(s):  
Toby Hopf ◽  
Konstantin Vassilevski ◽  
Enrique Escobedo-Cousin ◽  
Peter King ◽  
Nicholas G. Wright ◽  
...  
Keyword(s):  
Field Effect ◽  
Gate Dielectric ◽  
Field Effect Transistors ◽  
Electrical Characterization ◽  
Atomic Layer ◽  
Epitaxial Graphene ◽  
Vacuum Sublimation ◽  
Layer Deposition ◽  
High K

Top-gated field-effect transistors have been created from bilayer epitaxial graphene samples that were grown on SiC substrates by a vacuum sublimation approach. A high-quality dielectric layer of Al2O3was grown by atomic layer deposition to function as the gate oxide, with an e-beam evaporated seed layer utilized to promote uniform growth of Al2O3over the graphene. Electrical characterization has been performed on these devices, and temperature-dependent measurements yielded a rise in the maximum transconductance and a significant shifting of the Dirac point as the operating temperature of the transistors was increased.

scholarly journals Atomic Layer Deposition (ALD) of Metal Gates for CMOS

2019 ◽  
Vol 9 (11) ◽  
pp. 2388 ◽  
Author(s):  
Chao Zhao ◽  
Jinjuan Xiang
Keyword(s):  
Atomic Layer Deposition ◽  
Field Effect Transistors ◽  
Material Selection ◽  
Atomic Layer ◽  
Oxide Semiconductor ◽  
Metal Gate ◽  
Gate Stack ◽  
Short Channel ◽  
Metal Gates ◽  
Layer Deposition

The continuous down-scaling of complementary metal oxide semiconductor (CMOS) field effect transistors (FETs) had been suffering two fateful technical issues, one relative to the thinning of gate dielectric and the other to the aggressive shortening of channel in last 20 years. To solve the first issue, the high-κ dielectric and metal gate technology had been induced to replace the conventional gate stack of silicon dioxide layer and poly-silicon. To suppress the short channel effects, device architecture had changed from planar bulk Si device to fully depleted silicon on insulator (FDSOI) and FinFETs, and will transit to gate all-around FETs (GAA-FETs). Different from the planar devices, the FinFETs and GAA-FETs have a 3D channel. The conventional high-κ/metal gate process using sputtering faces conformality difficulty, and all atomic layer deposition (ALD) of gate stack become necessary. This review covers both scientific and technological parts related to the ALD of metal gates including the concept of effect work function, the material selection, the precursors for the deposition, the threshold voltage (Vt) tuning of the metal gate in contact with HfO2/SiO2/Si. The ALD of n-type metal gate will be detailed systematically, based mainly on the authors’ works in last five years, and the all ALD gate stacks will be proposed for the future generations based on the learning.

scholarly journals Conformal High-K Dielectric Coating of Suspended Single-Walled Carbon Nanotubes by Atomic Layer Deposition

Nanomaterials ◽  
2019 ◽  
Vol 9 (8) ◽  
pp. 1085 ◽  
Author(s):  
Kemelbay ◽  
Tikhonov ◽  
Aloni ◽  
Kuykendall
Keyword(s):  
Carbon Nanotubes ◽  
Atomic Layer Deposition ◽  
Field Effect Transistors ◽  
Atomic Layer ◽  
Oxide Thickness ◽  
Ambient Conditions ◽  
Nucleation Layer ◽  
Layer Deposition ◽  
High K ◽  
High K Dielectric

As one of the highest mobility semiconductor materials, carbon nanotubes (CNTs) have been extensively studied for use in field effect transistors (FETs). To fabricate surround-gate FETs— which offer the best switching performance—deposition of conformal, weakly-interacting dielectric layers is necessary. This is challenging due to the chemically inert surface of CNTs and a lack of nucleation sites—especially for defect-free CNTs. As a result, a technique that enables integration of uniform high-k dielectrics, while preserving the CNT’s exceptional properties is required. In this work, we show a method that enables conformal atomic layer deposition (ALD) of high-k dielectrics on defect-free CNTs. By depositing a thin Ti metal film, followed by oxidation to TiO2 under ambient conditions, a nucleation layer is formed for subsequent ALD deposition of Al2O3. The technique is easy to implement and is VLSI-compatible. We show that the ALD coatings are uniform, continuous and conformal, and Raman spectroscopy reveals that the technique does not induce defects in the CNT. The resulting bilayer TiO2/Al2O3 thin-film shows an improved dielectric constant of 21.7 and an equivalent oxide thickness of 2.7 nm. The electrical properties of back-gated and top-gated devices fabricated using this method are presented.

scholarly journals Nanoscale Devices for Rectification of High Frequency Radiation from the Infrared through the Visible: A New Approach

2012 ◽  
Vol 2012 ◽  
pp. 1-19 ◽  
Author(s):  
N. M. Miskovsky ◽  
P. H. Cutler ◽  
A. Mayer ◽  
B. L. Weiss ◽  
Brian Willis ◽  
...  
Keyword(s):  
Tunnel Junction ◽  
Schottky Diodes ◽  
Visible Region ◽  
Atomic Layer ◽  
Incident Radiation ◽  
Optical Rectification ◽  
Layer Deposition ◽  
Metal Insulator Metal ◽  
Conventional Material ◽  
Future Work

We present a new and viable method for optical rectification. This approach has been demonstrated both theoretically and experimentally and is the basis fot the development of devices to rectify radiation through the visible. This technique for rectification is based not on conventional material or temperature asymmetry as used in MIM (metal/insulator/metal) or Schottky diodes, but on a purely sharp geometric property of the antenna. This sharp “tip” or edge with a collector anode constitutes a tunnel junction. In these devices the rectenna (consisting of the antenna and the tunnel junction) acts as the absorber of the incident radiation and the rectifier. Using current nanofabrication techniques and the selective atomic layer deposition (ALD) process, junctions of 1 nm can be fabricated, which allow for rectification of frequencies up to the blue portion of the spectrum. To assess the viability of our approach, we review the development of nanoantenna structures and tunnel junctions capable of operating in the visible region. In addition, we review the detailed process of rectification and present methodologies for analysis of diode data. Finally, we present operational designs for an optical rectenna and its fabrication and discuss outstanding problems and future work.

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