Assessment of the Delay-Locked Loop Error due to Multipath Models Regarding a Deterministic-stochastic Channel and a GPS L1 Receiver Model for Kinematic Trajectories

2018 ◽  
Author(s):  
Alexandra Avram ◽  
Noha El Gemayel ◽  
Volker Schwieger
Keyword(s):  
Delay Locked Loop ◽  
Receiver Model

scholarly journals A fast molten salt receiver model in MATLAB

2019 ◽  
Author(s):  
Zhi Li ◽  
Zhifeng Wang ◽  
Qiangqiang Zhang ◽  
Fengwu Bai
Keyword(s):  
Molten Salt ◽  
Receiver Model

An Experimental Approach to the Introductory Political Science Course

1982 ◽  
Vol 35 ◽  
pp. 9-11
Author(s):  
William McClure ◽  
Michael Stohl
Keyword(s):  
Higher Education ◽  
Political Science ◽  
Experimental Approach ◽  
Expert Knowledge ◽  
Educational Process ◽  
Introductory Course ◽  
Teacher’S Role ◽  
Teacher's Role ◽  
Receiver Model ◽  
To Receive

The conventional introductory course rests upon the pedagogical assumption that the teacher's function is to transmit information (or knowledge) and that the student's function is to receive it. According to this transmitter-receiver model of the educational process, teaching begins with a “knower” who “transmits” what he knows to a “learner.” In higher education, certain euphemisms are employed to soften and furnish a color of legitimacy to this model: the teacher is a “scholar,” and “authority,” in his field; he possesses an “expert knowledge” which the student has come to school to “learn“; the student is the “learner.” The teacher's role, accordingly, is the active one of transmitting information and the student's role, accordingly, is the passive one of receiving and recording (or memorizing) this information.

scholarly journals Design of Multi Standard Near Field Communication Outphasing Transmitter with Modulation Wave Shaping

Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 188
Author(s):  
Žiga Korošak ◽  
Nejc Suhadolnik ◽  
Anton Pleteršek
Keyword(s):  
Radio Frequency Identification ◽  
High Efficiency ◽  
Near Field ◽  
Cmos Technology ◽  
Near Field Communication ◽  
Differential Delay ◽  
Fully Differential ◽  
Delay Locked Loop ◽  
Modulation Wave ◽  
The Individual

The aim of this work is to tackle the problem of modulation wave shaping in the field of near field communication (NFC) radio frequency identification (RFID). For this purpose, a high-efficiency transmitter circuit was developed to comply with the strict requirements of the newest EMVCo and NFC Forum specifications for pulse shapes. The proposed circuit uses an outphasing modulator that is based on a digital-to-time converter (DTC). The DTC based outphasing modulator supports amplitude shift keying (ASK) modulation, operates at four times the 13.56 MHz carrier frequency and is made fully differential in order to remove the parasitic phase modulation components. The accompanying transmitter logic includes lookup tables with programmable modulation pulse wave shapes. The modulator solution uses a 64-cell tapped current controlled fully differential delay locked loop (DLL), which produces a 360° delay at 54.24 MHz, and a glitch-free multiplexor to select the individual taps. The outphased output from the modulator is mixed to create an RF pulse width modulated (PWM) output, which drives the antenna. Additionally, this implementation is fully compatible with D-class amplifiers enabling high efficiency. A test circuit of the proposed differential multi-standard reader’s transmitter was simulated in 40 nm CMOS technology. Stricter pulse shape requirements were easily satisfied, while achieving an output linearity of 0.2 bits and maximum power consumption under 7.5 mW.

scholarly journals A Fast Lock All-Digital MDLL Using a Cyclic Vernier TDC for Burst-Mode Links

Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 177
Author(s):  
Dongjun Park ◽  
Sungwook Choi ◽  
Jongsun Kim
Keyword(s):  
Sampling Technique ◽  
Cmos Process ◽  
Detection Range ◽  
Delay Locked Loop ◽  
Delta Sigma Modulator ◽  
Correlated Double Sampling ◽  
Delta Sigma ◽  
Fast Power ◽  
Low Jitter ◽  
Reference Clock

An all-digital multiplying delay-locked loop (MDLL)-based clock multiplier featuring a time-to-digital converter (TDC) to achieve fast power-on capability is presented. The proposed MDLL adopts a new offset-free cyclic Vernier TDC to achieve a fast lock time of 15 reference clock cycles while maintaining a wide detection range and high resolution. The proposed offset-free TDC also uses a correlated double sampling technique to remove mismatch and offset issues, resulting in low jitter characteristics. After the MDLL is quickly locked, the TDC is turned off, and it goes into delta-sigma modulator (DSM)-based sequential tracking mode to reduce power consumption and improve jitter performance. Implemented in a 65-nm 1.0-V CMOS process, the proposed MDLL occupies an active area of 0.043 mm2 and generates a 2.4-GHz output clock from a 75-MHz reference clock (multiplication factor N = 32). It achieves an effective peak-to-peak jitter of 9.4 ps and consumes 3.3 mW at 2.4 GHz.

A 1.0-ns/1.0-V Delay-Locked Loop With Racing Mode and Countered CAS Latency Controller for DRAM Interfaces

2012 ◽  
Vol 47 (6) ◽  
pp. 1436-1447 ◽  
Author(s):  
Hyun-Woo Lee ◽  
Hoon Choi ◽  
Beom-Ju Shin ◽  
Kyung-Hoon Kim ◽  
Kyung-Whan Kim ◽  
...  
Keyword(s):  
Delay Locked Loop

A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop

2008 ◽  
Author(s):  
Li-Pu Chuang ◽  
Ming-Hung Chang ◽  
Po-Tsang Huang ◽  
Chih-Hao Kan ◽  
Wei Hwang
Keyword(s):  
Delay Locked Loop

Sensitivity Analysis of the Levelized Cost of Electricity for a Particle-Based CSP System

2021 ◽  
Author(s):  
Luis F. González-Portillo ◽  
Kevin J. Albrecht ◽  
Jeremy Sment ◽  
Brantley Mills ◽  
Clifford K. Ho
Keyword(s):  
Sensitivity Analysis ◽  
Heat Exchanger ◽  
Upper Bounds ◽  
Cumulative Distribution ◽  
Wind Effect ◽  
Lower And Upper Bounds ◽  
Levelized Cost Of Electricity ◽  
Receiver Model ◽  
Tower Height ◽  
And Storage

Abstract This study presents a sensitivity analysis of the LCOE for a particle-based system with the costs of the most current components. New models for the primary heat exchanger, thermal energy storage and tower are presented and used to establish lower and upper bounds for these three components. The rest of component costs such as particle cost, cavity cost, lift cost and balance of power are set to lower and upper bounds estimating a 25% of uncertainty. Some relevant parameters such as lift efficiency and storage thermal resistance are also included in the analysis with a 25% uncertainty. This study also includes an upgrade to the receiver model by including the wind effect in the efficiency, which was not included in previous publications. A parametric analysis shows the optimum values of solar multiple, storage hours, tower height and concentration ratio, and a probabilistic analysis provides a cumulative distribution function for a range of LCOE values. The results show that the LCOE could be below $0.06/kWh with a probability of 90%, where the highest uncertainty is on the primary heat exchanger cost.

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