scholarly journals SILICON-ON-SILICON (SOS): A NEW CMOS COMPATIBLE LOW-TEMPERATURE MEMS PROCESS USING PLASMA ACTIVATED FUSION BONDING

2006 ◽  
Author(s):  
T. Galchev ◽  
W.C. Welch III ◽  
K. Najafi
Keyword(s):  
Low Temperature ◽  
Fusion Bonding ◽  
Cmos Compatible ◽  
Mems Process

Effects on Silanol Condensation during Low Temperature Silicon Fusion Bonding

2009 ◽  
Vol 156 (10) ◽  
pp. H786 ◽  
Author(s):  
M. Eichler ◽  
B. Michel ◽  
P. Hennecke ◽  
C.-P. Klages
Keyword(s):  
Low Temperature ◽  
Fusion Bonding

A Novel Latching Relay Fabricated Using an Oxide Molded Tungsten Process

2005 ◽  
Vol 872 ◽  
Author(s):  
J.G. Fleming ◽  
Michael Baker ◽  
David Luck
Keyword(s):  
Chemical Vapor Deposition ◽  
Low Temperature ◽  
Tensile Stress ◽  
Vapor Deposition ◽  
Chemical Mechanical Polishing ◽  
Chemical Vapor ◽  
Metal Contacts ◽  
Cmos Compatible ◽  
Mems Device ◽  
Very High

AbstractIn this paper we describe an oxide molded tungsten process applied to the fabrication of a novel latching relay. The steps in the process are: deposition of a sacrificial oxide, patterning of the oxide, filling of the resulting mold with a blanket film of tungsten using chemical vapor deposition (CVD), and then the removal and planarization of excess tungsten through chemical mechanical polishing (CMP). The process for the incorporation of dielectric isolation has also been developed. The resulting tungsten structures are under high tensile stress, which appears to be compensated in process by the compressive stress of the oxide mold. All the steps are low temperature and the entire process is backend CMOS compatible. This process has been used to fabricate a latching relay which relies on the internal stress of the tungsten and always generates force in a pulling mode. Parts have been successfully fabricated and tested, the devices generate very high forces for a MEMS device and give reasonable contact resistances even without noble metal contacts.

Novel low-temperature CMOS-compatible full-wafer-bonding process for the fabrication of 3D embedded microchannels using SU-8

2004 ◽  
Author(s):  
Francisco J. Blanco ◽  
Maria Agirregabiria ◽  
Maria Tijero ◽  
Javier Berganzo ◽  
Jorge Garcia ◽  
...  
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Bonding Process ◽  
Cmos Compatible

GaAs Low Temperature Fusion Bonding

1994 ◽  
Vol 141 (11) ◽  
pp. 3242-3245 ◽  
Author(s):  
K. Hjort ◽  
F. Ericson ◽  
J. Aå. Schweitz ◽  
C. Hallin ◽  
E. Janzén
Keyword(s):  
Low Temperature ◽  
Fusion Bonding

A CMOS compatible low temperature process for photonic crystal MEMS scanner

2009 ◽  
Author(s):  
K. Takahashi ◽  
I. W. Jung ◽  
A. Higo ◽  
Y. Mita ◽  
H. Fujita ◽  
...  
Keyword(s):  
Photonic Crystal ◽  
Low Temperature ◽  
Cmos Compatible ◽  
Low Temperature Process
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