scholarly journals Crystal Growth of Polycrystalline Silicon by Excimer Laser Annealing-Influence of Hydrogens and Substrate Thermal Conductivity on the Critical Energy Density-

Shinku ◽  
2003 ◽  
Vol 46 (10) ◽  
pp. 745-751 ◽  
Author(s):  
Naoto MATSUO ◽  
Naoya KAWAMOTO ◽  
Fakhrul Anwar Bin Abd AZIZ ◽  
Isao HASEGAWA ◽  
Kouji YAMANO ◽  
...  
1985 ◽  
Vol 53 ◽  
Author(s):  
A. Christou ◽  
T. Efthimiopoulos ◽  
G. Kyriakidis ◽  
C. Varmazis

ABSTRACTExcimer laser annealing at 248 nm has resulted in the recrystallization of a-GaAs on (100) silicon. An AlAs encapsulation layer was found to be necessary to prevent the loss of arsenic during laser annealing. An energy density of 105 mJ/cm2 was the critical energy density which gave optimum results. Field effect transistors were fabricated on the regrown (100) GaAs utilizing ion implantation for the n-type channel, and resulted in a transconductance of 70–80 mS/mm.


Shinku ◽  
2000 ◽  
Vol 43 (12) ◽  
pp. 1120-1125 ◽  
Author(s):  
Naoto MATSUO ◽  
Hisashi ABE ◽  
Naoya KAWAMOTO ◽  
Ryouhei TAGUCHI ◽  
Tomoyuki NOUDA ◽  
...  

2007 ◽  
Vol 124-126 ◽  
pp. 371-374 ◽  
Author(s):  
C.N. Chen ◽  
G.M. Wu ◽  
W.S. Feng

Low temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) are demanded to fabricate high performance liquid crystal displays (LCD) and organic light-emitting diode displays (OLED). The mobility of poly-Si TFT can be two orders of magnitude higher than that of amorphous Si (a-Si) TFT. Excimer laser annealing has been studied to be the most promising technology to meet the stringent requirement in high speed operation. The process parameters were identified as a-Si thickness, laser energy density, overlap ratio, annealing atmosphere and pre-clean condition. The a-Si layer of 40-50 nm was deposited by plasma enhanced chemical vapor deposition (PECVD). The XeCl excimer laser was irradiated on the a-Si film at room temperature under N2 or N2/O2 environment. The energy density ranged 250-400 mJ/cm2, and the overlap ratio was 95-99%. The highly aligned poly-Si array thin film could be obtained. The grain size has been about 0.31x0.33 μm2, and the regular arrangement in poly-Si grains was discussed. In addition, the PMOS TFT has been fabricated from the aligned poly-Si array. The mobility was as high as 100 cm2/Vs and the sub-threshold swing was around 0.24 V/dec. The threshold voltage was -1.25 V and the on/off current ratio was about 106.


2006 ◽  
Vol 45 (4A) ◽  
pp. 2726-2730 ◽  
Author(s):  
Naoya Kawamoto ◽  
Atsushi Masuda ◽  
Naoto Matsuo ◽  
Yasuhiro Seri ◽  
Toshimasa Nishimori ◽  
...  

2006 ◽  
Vol 45 (5B) ◽  
pp. 4344-4346 ◽  
Author(s):  
Shinji Munetoh ◽  
Takahide Kuranaga ◽  
Byoung Min Lee ◽  
Teruaki Motooka ◽  
Takahiko Endo ◽  
...  

2002 ◽  
Vol 46 (8) ◽  
pp. 1085-1090 ◽  
Author(s):  
Chang-Ho Tseng ◽  
Ching-Wei Lin ◽  
Teh-Hung Teng ◽  
Ting-Kuo Chang ◽  
Huang-Chung Cheng ◽  
...  

2004 ◽  
Vol 43 (1) ◽  
pp. 293-298 ◽  
Author(s):  
Naoya Kawamoto ◽  
Naoto Matsuo ◽  
Hisashi Abe ◽  
Fakhrul Anwar ◽  
Isao Hasegawa ◽  
...  

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