scholarly journals Sensitivity Analysis of Locked Circuits

10.29007/7tpd ◽  
2020 ◽  
Author(s):  
Joseph Sweeney ◽  
Marijn J. H. Heule ◽  
Lawrence Pileggi
Keyword(s):  
Sensitivity Analysis ◽  
Intellectual Property ◽  
Integrated Circuits ◽  
Inverse Relationship ◽  
Logic Locking ◽  
Provably Secure

Globalization of integrated circuits manufacturing has led to increased security con- cerns, notably theft of intellectual property. In response, logic locking techniques have been developed for protecting designs, but many of these techniques have been shown to be vulnerable to SAT-based attacks. In this paper, we explore the use of Boolean sensi- tivity to analyze these locked circuits. We show that in typical circuits there is an inverse relationship between input width and sensitivity. We then demonstrate the utility of this relationship for deobfuscating circuits locked with a class of “provably secure” logic lock- ing techniques. We conclude with an example of how to resist this attack, although the resistance is shown to be highly circuit dependent.

scholarly journals Breaking CAS-Lock and Its Variants by Exploiting Structural Traces

2021 ◽  
pp. 418-440
Author(s):  
Abhrajit Sengupta ◽  
Nimisha Limaye ◽  
Ozgur Sinanoglu
Keyword(s):  
Intellectual Property ◽  
Success Rate ◽  
Turning Point ◽  
Boolean Satisfiability ◽  
Point Function ◽  
Extensive Simulation ◽  
Logic Locking ◽  
Simulation Results ◽  
The Cost ◽  
Intellectual Property Theft

Logic locking is a prominent solution to protect against design intellectual property theft. However, there has been a decade-long cat-and-mouse game between defenses and attacks. A turning point in logic locking was the development of miterbased Boolean satisfiability (SAT) attack that steered the research in the direction of developing SAT-resilient schemes. These schemes, however achieved SAT resilience at the cost of low output corruption. Recently, cascaded locking (CAS-Lock) [SXTF20a] was proposed that provides non-trivial output corruption all-the-while maintaining resilience to the SAT attack. Regardless of the theoretical properties, we revisit some of the assumptions made about its implementation, especially about security-unaware synthesis tools, and subsequently expose a set of structural vulnerabilities that can be exploited to break these schemes. We propose our attacks on baseline CAS-Lock as well as mirrored CAS (M-CAS), an improved version of CAS-Lock. We furnish extensive simulation results of our attacks on ISCAS’85 and ITC’99 benchmarks, where we show that CAS-Lock/M-CAS can be broken with ∼94% success rate. Further, we open-source all implementation scripts, locked circuits, and attack scripts for the community. Finally, we discuss the pitfalls of point function-based locking techniques including Anti-SAT [XS18] and Stripped Functionality Logic Locking(SFLL-HD) [YSN+17], which suffer from similar implementation issues.

scholarly journals CAS-Lock: A Security-Corruptibility Trade-off Resilient Logic Locking Scheme

2019 ◽  
pp. 175-202
Author(s):  
Bicky Shakya ◽  
Xiaolin Xu ◽  
Mark Tehranipoor ◽  
Domenic Forte
Keyword(s):  
Intellectual Property ◽  
Boolean Function ◽  
Brute Force ◽  
Trade Off ◽  
Area Overhead ◽  
Limited Output ◽  
Logic Locking ◽  
Stark Contrast ◽  
Minimal Area ◽  
Rule Out

Logic locking has recently been proposed as a solution for protecting gatelevel semiconductor intellectual property (IP). However, numerous attacks have been mounted on this technique, which either compromise the locking key or restore the original circuit functionality. SAT attacks leverage golden IC information to rule out all incorrect key classes, while bypass and removal attacks exploit the limited output corruptibility and/or structural traces of SAT-resistant locking schemes. In this paper, we propose a new lightweight locking technique: CAS-Lock (cascaded locking) which nullifies both SAT and bypass attacks, while simultaneously maintaining nontrivial output corruptibility. This property of CAS-Lock is in stark contrast to the well-accepted notion that there is an inherent trade-off between output corruptibility and SAT resistance. We theoretically and experimentally validate the SAT resistance of CAS-Lock, and show that it reduces the attack to brute-force, regardless of its construction. Further, we evaluate its resistance to recently proposed approximate SAT attacks (i.e., AppSAT). We also propose a modified version of CAS-Lock (mirrored CAS-Lock or M-CAS) to protect against removal attacks. M-CAS allows a trade-off evaluation between removal attack and SAT attack resiliency, while incurring minimal area overhead. We also show how M-CAS parameters such as the implemented Boolean function and selected key can be tuned by the designer so that a desired level of protection against all known attacks can be achieved.

Intellectual Property

2005 ◽  
Author(s):  
Wendy J. Gordon
Keyword(s):  
Intellectual Property ◽  
Integrated Circuits ◽  
Industrial Design ◽  
Moral Rights ◽  
Plant Breeder ◽  
Family Relation ◽  
International Obligations

This article focuses on a group of doctrines that bear a family relation to each other, doctrines usually included under the rubric of ‘Intellectual Property’ (IP), and these include, among others, copyright, patent, trademark, trade secrecy, so-called ‘moral’ rights, rights in the topography of integrated circuits, rights in industrial design, plant breeder rights, rights of publicity, database rights, and rights against misappropriation. Not all nations recognize or enforce all the doctrines, but because of international obligations, most nations must recognize much of this list. Each doctrine involves restraining people from using or duplicating a pattern that is owned by, or associated with, another party. The article describes the primary areas of IP. This is followed by an outline of some of the dominant economic approaches, as economics provides the most developed line of systematic scholarship thus far.

scholarly journals LEGAL PROTECTION OF INTERIOR DESIGN IN INDUSTRIAL DESIGN INTELLECTUAL PROPERTY RIGHTS

2021 ◽  
Vol 6 (1) ◽  
pp. 27-37
Author(s):  
Ida Ayu Sadnyini ◽  
I Gede Putu Agus Wistama Putra ◽  
A.A.A.Ngurah Sri Rahayu Gorda ◽  
A.A.A. Ngurah Tini Rusmini Gorda
Keyword(s):  
Intellectual Property ◽  
Property Rights ◽  
Integrated Circuits ◽  
Intellectual Property Rights ◽  
Interior Design ◽  
Industrial Design ◽  
Human Life ◽  
Legal Protection ◽  
Legal Basis ◽  
Industrial Property

Intellectual property is creativity that results from human thought in order to meet the needs and welfare of human life. Currently, IPR issues are widely discussed in the context of international issues. IPR includes two parts, namely Copyrights and Industrial Property Rights. Industrial property rights include patents, industrial designs, integrated circuits layout designs, trade secrets, geographic indications, trademarks and plant variety protection (PVP). Interior design is part of industrial design. Interior design has experienced significant developments in recent years, including in Indonesia. Problems that arises is plagiarisms done by imitating or using the "similarity" of an interior design that already has an industrial design certificate without any permission from the design owner. This study aims to find out the legal protection of interior design in the intellectual property rights of industrial design and the legal basis used by judges in deciding industrial design rights disputes. The result of this study showed that the legal protection of interior design in the intellectual property rights of industrial design involved two legal protections; they are preventive legal protections and repressive legal protections. Furthermore, Gustav Radbruch's theory of legal ideals is used as a legal basis in deciding cases of disputes over industrial design rights based on justice, benefits, and legal certainty in the case of industrial design disputes Ecosfera Room.  

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