A Wear Leveling Aware Memory Allocator for Both Stack and Heap Management in PCM-based Main Memory Systems

2019 ◽  
Author(s):  
Wei Li ◽  
Ziqi Shuai ◽  
Chun Jason Xue ◽  
Mengting Yuan ◽  
Qingan Li
Keyword(s):  
Memory Systems ◽  
Main Memory ◽  
Wear Leveling

Stack Usage Analysis for Efficient Wear Leveling in Non-Volatile Main Memory Systems

2019 ◽  
Author(s):  
Christian Hakert ◽  
Mikail Yayla ◽  
Kuan-Hsun Chen ◽  
Georg von der Bruggen ◽  
Jian-Jia Chen ◽  
...  
Keyword(s):  
Memory Systems ◽  
Main Memory ◽  
Wear Leveling ◽  
Usage Analysis

scholarly journals A Block Classification Method with Monitor and Restriction in NAND Flash memory

2021 ◽  
Vol 12 (5) ◽  
pp. 209-215
Author(s):  
Myungsub Lee
Keyword(s):  
Performance Evaluation ◽  
Standard Deviation ◽  
Flash Memory ◽  
Garbage Collection ◽  
Memory Systems ◽  
Nand Flash ◽  
Nand Flash Memory ◽  
Wear Leveling ◽  
Block Classification ◽  
Update Frequency

In this paper, we propose a block classification with monitor and restriction (BCMR) method to isolate and reduce the interference of blocks in garbage collection and wear leveling. The proposed method monitors the endurance variation of blocks during garbage collection and detects hot blocks by making a restriction condition based on this information. This method induces block classification by its update frequency for garbage collection and wear leveling, resulting in a prolonged lifespan for NAND flash memory systems. The performance evaluation results show that the BCMR method prolonged the life of NAND flash memory systems by 3.95% and reduced the standard deviation per block by 7.4%, on average.

HAD-TWL: Hot Address Detection-Based Wear Leveling for Phase-Change Memory Systems with Low Latency

2019 ◽  
Vol 18 (2) ◽  
pp. 107-110 ◽  
Author(s):  
Sunwoong Kim ◽  
Hyunmin Jung ◽  
Woojae Shin ◽  
Hyokeun Lee ◽  
Hyuk-Jae Lee
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Memory Systems ◽  
Low Latency ◽  
Wear Leveling ◽  
Change Memory

scholarly journals Q-Selector-Based Prefetching Method for DRAM/NVM Hybrid Main Memory System

Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2158
Author(s):  
Jeong-Geun Kim ◽  
Shin-Dug Kim ◽  
Su-Kyung Yoon
Keyword(s):  
Performance Status ◽  
Random Access ◽  
Memory Systems ◽  
Memory System ◽  
Main Memory ◽  
Learning Method ◽  
Q Learning ◽  
Data Intensive ◽  
Big Data Applications ◽  
Non Volatile Memory

This research is to design a Q-selector-based prefetching method for a dynamic random-access memory (DRAM)/ Phase-change memory (PCM)hybrid main memory system for memory-intensive big data applications generating irregular memory accessing streams. Specifically, the proposed method fully exploits the advantages of two-level hybrid memory systems, constructed as DRAM devices and non-volatile memory (NVM) devices. The Q-selector-based prefetching method is based on the Q-learning method, one of the reinforcement learning algorithms, which determines a near-optimal prefetcher for an application’s current running phase. For this, our model analyzes real-time performance status to set the criteria for the Q-learning method. We evaluate the Q-selector-based prefetching method with workloads from data mining and data-intensive benchmark applications, PARSEC-3.0 and graphBIG. Our evaluation results show that the system achieves approximately 31% performance improvement and increases the hit ratio of the DRAM-cache layer by 46% on average compared to a PCM-only main memory system. In addition, it achieves better performance results compared to the state-of-the-art prefetcher, access map pattern matching (AMPM) prefetcher, by 14.3% reduction of execution time and 12.89% of better CPI enhancement.

Wear-Leveling Aware Page Management for Non-Volatile Main Memory on Embedded Systems

2016 ◽  
Vol 2 (2) ◽  
pp. 129-142 ◽  
Author(s):  
Chen Pan ◽  
Shouzhen Gu ◽  
Mimi Xie ◽  
Yongpan Liu ◽  
Chun Jason Xue ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Main Memory ◽  
Wear Leveling
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