Slippage Costs in Order Execution for a Public Futures Fund

1992 ◽  
Vol 14 (2) ◽  
pp. 281 ◽  
Author(s):  
Thomas V. Greer ◽  
B. Wade Brorsen ◽  
Shi-Miin Liu
Keyword(s):  
Order Execution

Interrupt handling for out-of-order execution processors

1993 ◽  
Vol 42 (1) ◽  
pp. 122-127 ◽  
Author(s):  
H.C. Torng ◽  
M. Day
Keyword(s):  
Interrupt Handling ◽  
Order Execution

scholarly journals NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution

2012 ◽  
Vol 2012 ◽  
pp. 1-12 ◽  
Author(s):  
Kaveh Aasaraai ◽  
Andreas Moshovos
Keyword(s):  
High Efficiency ◽  
Main Memory ◽  
Data Cache ◽  
Improve Performance ◽  
Data Caches ◽  
Content Addressable Memories ◽  
Processor Designs ◽  
Level Parallelism ◽  
Order Execution ◽  
Runahead Execution

Soft processors often use data caches to reduce the gap between processor and main memory speeds. To achieve high efficiency, simple, blocking caches are used. Such caches are not appropriate for processor designs such as Runahead and out-of-order execution that require nonblocking caches to tolerate main memory latencies. Instead, these processors use non-blocking caches to extract memory level parallelism and improve performance. However, conventional non-blocking cache designs are expensive and slow on FPGAs as they use content-addressable memories (CAMs). This work proposes NCOR, an FPGA-friendly non-blocking cache that exploits the key properties of Runahead execution. NCOR does not require CAMs and utilizes smart cache controllers. A 4 KB NCOR operates at 329 MHz on Stratix III FPGAs while it uses only 270 logic elements. A 32 KB NCOR operates at 278 Mhz and uses 269 logic elements.

Order Execution and Limit Order Book

2015 ◽  
pp. 108-138
Author(s):  
Ali N. Akansu ◽  
Mustafa U. TorunTorun
Keyword(s):  
Limit Order Book ◽  
Order Book ◽  
Limit Order ◽  
Order Execution

scholarly journals Improving Order Execution Cost Estimation by Semisupervised Learning

IEEE Access ◽  
2019 ◽  
Vol 7 ◽  
pp. 178342-178356
Author(s):  
Xiaodong Li ◽  
Pangjing Wu ◽  
Rongrong Bo
Keyword(s):  
Cost Estimation ◽  
Semisupervised Learning ◽  
Order Execution

LOOG: Improving GPU Efficiency With Light-Weight Out-Of-Order Execution

2019 ◽  
Vol 18 (2) ◽  
pp. 166-169
Author(s):  
Konstantinos Iliakis ◽  
Sotirios Xydis ◽  
Dimitrios Soudris
Keyword(s):  
Light Weight ◽  
Order Execution

Out-of-Order Execution Processors

2011 ◽  
pp. 1401-1401
Author(s):  
David Wonnacott ◽  
Barbara Chapman ◽  
James LaGrone ◽  
Karl Fürlinger ◽  
Stephen W Poole ◽  
...  
Keyword(s):  
Order Execution
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