scholarly journals Low-voltage, low-power and high gain cmosota using active positive feedback with feed forward and FDCM techniques

2002 ◽  
Vol 15 (1) ◽  
pp. 93-101
Author(s):  
Lyes Bouzerara ◽  
Tahar Belaroussi ◽  
Boualem Amirouche

A low voltage, high dc gain and wideband load compensated cas code operational transconductance amplifier (OTA), using an active positive feedback with feed forward technique and frequency-dependent current mirrors (FDCM), is presented and analyzed. Such techniques stand as a powerful method of gain bandwidth and phase margin enhancements. In this paper, a frequency-dependent current mirror, whose input impedance increases with frequency, is used to form the feed forward path at the input of the current mirror with a feed forward capacitor. By using these techniques, the gain bandwidth product of the amplifier is improved from 115 MHz to 194 MHz, the phase margin is also improved from 85? to 95? and the gain is enhanced from 11 dB to 93 dB. This amplifier operates at 2.5 V power supply voltage drives a capacitive load of 1pF and gives a power dissipation of 7 mW. The predicted performance is verified by simulations using HSPICE tool with 0.8 fim CMOS AMS parameters.

2002 ◽  
Vol 15 (3) ◽  
pp. 361-369
Author(s):  
Lyes Bouzerara ◽  
Mohand Belaroussi

A low voltage CMOS wideband operational Tran conductance amplifier (OTA) using regulated cascade structure with an active positive feedback frequency-dependent current mirrors and feed forward techniques, is presented and analyzed. Such techniques stand as a powerful method of gain bandwidth, output impedance and phase margin enhancements. In this paper, an efficient implementation of a high output impedance current mirror is used in the design of an OTA by means of the regulated cascade circuits. This amplifier operates at ?1.25 V power supply voltage, exhibits a voltage gain of 68 dB, and provides a gain bandwidth product of 166 MHz. It drives a capacitive load of 1.6 pF and gives a power dissipation of 8.5 mW. The predicted performance is verified by simulations using HSPICE tool with 0.35 /itm CMOS TSMC parameters.


2017 ◽  
Vol 68 (4) ◽  
pp. 245-255 ◽  
Author(s):  
Matej Rakús ◽  
Viera Stopjaková ◽  
Daniel Arbet

AbstractIn this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This analysis shows that the most suitable design methods for low-voltage analog IC design in a standard CMOS process include techniques using bulk-driven MOS transistors, dynamic threshold MOS transistors and MOS transistors operating in weak or moderate inversion regions. The main advantage of such techniques is that there is no need for any modification of standard CMOS structure or process. Basic circuit building blocks like differential amplifiers or current mirrors designed using these approaches are able to operate with the power supply voltage of 600 mV (or even lower), which is the key feature towards integrated systems for modern portable applications.


2005 ◽  
Vol 3 ◽  
pp. 377-381
Author(s):  
A. Bargagli-Stoffi ◽  
J. Sauerbrey ◽  
J. Wang ◽  
D. Schmitt-Landsiedel

Abstract. With the shrinking of the device dimensions, the power supply voltage value is continuously decreasing. Since the threshold voltage value does not decrease as much as the power supply and the drain source saturation voltage becomes an important fraction of the power supply, many amplifier architectures are no more suitable for modern processes. A transconductance amplifier based on current mirrors is analyzed highlighting the main challenges of a low-voltage analog design. Among the many proposed amplifier architectures, a topology based on current mirrors has been chosen as the most promising to operate with low voltages. Simulations with 90nm CMOS prove the feasibility of circuit operation with satisfactory performance at an operating power supply voltage as low as 0.6V.


2017 ◽  
Vol 15 ◽  
pp. 115-121
Author(s):  
Sehoon Park ◽  
Xuan-Quang Du ◽  
Markus Grözing ◽  
Manfred Berroth

Abstract. This paper presents the design of a limiting amplifier with 1-to-3 fan-out implementation in a 0.13 µm SiGe BiCMOS technology and gives a detailed guideline to determine the circuit parameters of the amplifier for optimum high-frequency performance based on simplified gain estimations. The proposed design uses a Cherry-Hooper topology for bandwidth enhancement and is optimized for maximum group delay flatness to minimize phase distortion of the input signal. With regard to a high integration density and a small chip area, the design employs no passive inductors which might be used to boost the circuit bandwidth with inductive peaking. On a RLC-extracted post-layout simulation level, the limiting amplifier exhibits a gain-bandwidth-product of 14.6 THz with 56.6 dB voltage gain and 21.5 GHz 3 dB bandwidth at a peak-to-peak input voltage of 1.5 mV. The group delay variation within the 3 dB bandwidth is less than 0.5 ps and the power dissipation at a power supply voltage of 3 V including output drivers is 837 mW.


Author(s):  
Furkan Barin ◽  
Ertan Zencir

In this paper, an ultra-wideband fully differential two-stage telescopic 65-nm CMOS op-amp is presented, which uses low-voltage design techniques such as level shifter circuits and low-voltage cascode current mirrors. The designed op-amp consists of two stages. While the telescopic first stage provides high speed and low swing, the second stage provides high gain and large swing. Common-mode feedback circuits (CMFB), which contain five transistors OTA and sensing resistors, are used to set the first-stage output to a known value. The designed two-stage telescopic operational amplifier has 41.04[Formula: see text]dB lower frequency gain, 1.81[Formula: see text]GHz gain-bandwidth product (GBW) and 51.9∘ phase margin under 5[Formula: see text]pF load capacitance. The design consumes a total current of 11.9[Formula: see text]mA from a 1.2-V supply voltage. Presented fully differential two-stage telescopic op-amp by using low-voltage design techniques is suitable for active filter in vehicle-to-everything (V2X) applications with 120[Formula: see text][Formula: see text]m[Formula: see text]m layout area.


2003 ◽  
Vol 16 (2) ◽  
pp. 195-204
Author(s):  
Lyes Bouzerara ◽  
Mohand Belaroussi

A very high bandwidth class AB (Push-Pull) current amplifier using the compensation resistor technique is presented and analyzed. Such technique stands as a powerful method of bandwidth enhancement for general circuits using CMOS current mirrors. The proposed bandwidth is enhanced from 675 MHz for the uncompensated current amplifier to 745MHz for the compensated one without affecting the current gain and other design parameters such as power consumption and output swing. The circuit exhibits a current gain of 20 dB and consumes 1.48 mW for ?2.5V power supply voltage. All simulation results were performed using Hspice tool with 0.35^m CMOS TSMC parameters.


2014 ◽  
Vol 23 (06) ◽  
pp. 1450088 ◽  
Author(s):  
LEONARDO PANTOLI ◽  
VINCENZO STORNELLI ◽  
GIORGIO LEUZZI

In this paper, we present a low-voltage tunable active filter for microwave applications. The proposed filter is based on a single-transistor active inductor (AI), that allows the reduction of circuit area and power consumption. The three active-cell bandpass filter has a 1950 MHz center frequency with a -1 dB flat bandwidth of 10 MHz (Q ≈ 200), a shape factor (30–3 dB) of 2.5, and can be tuned in the range 1800–2050 MHz, with constant insertion loss. A dynamic range of about 75 dB is obtained, with a P1dB compression point of -5 dBm. The prototype board, fabricated on a TLX-8 substrate, has a 4 mW power consumption with a 1.2 V power supply voltage.


2018 ◽  
Vol 27 (08) ◽  
pp. 1850128 ◽  
Author(s):  
R. Nagulapalli ◽  
K. Hayatleh ◽  
Steve Barker ◽  
Sumathi Raparthy ◽  
Nabil Yassine ◽  
...  

This paper exploits the CMOS beta multiplier circuit to synthesize a temperature-independent voltage reference suitable for low voltage and ultra-low power biomedical applications. The technique presented here uses only MOS transistors to generate Proportional To Absolute Temperature (PTAT) and Complimentary To Absolute Temperature (CTAT) currents. A self-biasing technique has been used to minimize the temperature and power supply dependency. A prototype in 65[Formula: see text]nm CMOS has been developed and occupies 0.0039[Formula: see text]mm2, and at room temperature, it generates a 204[Formula: see text]mV reference voltage with 1.3[Formula: see text]mV drift over a wide temperature range (from [Formula: see text]40[Formula: see text]C to 125[Formula: see text]C). This has been designed to operate with a power supply voltage down to 0.6[Formula: see text]V and consumes 1.8[Formula: see text]uA current from the supply. The simulated temperature coefficient is 40[Formula: see text]ppm/[Formula: see text]C.


2015 ◽  
Vol 734 ◽  
pp. 897-900
Author(s):  
Ji Fang Zhang ◽  
Wei Liu ◽  
Shi Wei Sun

Double PWM welding power source can restrain the net side current harmonic. In order to suppress the transient when the intermediate DC link voltage fluctuation, generally adopt the method of increasing capacitor capacity, the disadvantages of this approach are: slow dynamic response, large volume, low service life, high cost of equipment. Therefore put forward a kind of double PWM welding power source based on feed-forward control power, using the power of feed-forward can effectively inhibit the intermediate DC link voltage fluctuation, based on the control method of the power system has a high power factor, good dynamic performance, simple and easy, good application prospect.


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