Letter: A low-cost low-temperature thin-film-transistor backplane based on oxide semiconductor

2012 ◽  
Vol 20 (4) ◽  
pp. 175 ◽  
Author(s):  
Linfeng Lan ◽  
Nana Xiong ◽  
Peng Xiao ◽  
Wen Shi ◽  
Miao Xu ◽  
...  
2022 ◽  
Vol 2152 (1) ◽  
pp. 012008
Author(s):  
Qian Chen

Abstract Metal oxide semiconductor (MOS) is essential to compose high-performance electronic devices, however, the investigation on p-type MOS is relatively rare compared with its n-type counterpart. In this work, LaGaO3 thin films with superior p-type conductivity have been prepared via a facile solution process. Moreover, we have implemented Al2O3 and SiO2 as the dielectric of the p-channel LaGaO3 thin film transistors (TFTs) annealed at different temperatures. Particularly, the LaGaO3/Al2O3 TFTs annealed at 700 °C exhibit an ultrahigh hole mobility of 12.4 cm2V-1s-1, Under the same conditions, LaGaO3/Al2O3 thin film transistor is two orders of magnitude higher than LaGaO3/SiO2 thin film transistor. The advanced p-type characteristics of the LaGaO3 thin film, along with its facile low-cost fabrication process can shed new light on future design of high-performance complementary MOS circuit with other optimized facile-integrated dielectrics.


2013 ◽  
Vol 1530 ◽  
Author(s):  
Hanbin Ma ◽  
Ben Miller ◽  
Sungsik Lee ◽  
Arman Ahnood ◽  
Marius Bauza ◽  
...  

ABSTRACTElectronic systems are a very good platform for sensing biological signals for fast point-of-care diagnostics or threat detection. One of the solutions is the lab-on-a-chip integrated circuit (IC), which is low cost and high reliability, offering the possibility for label-free detection. In recent years, similar integrated biosensors based on the conventional complementary metal oxide semiconductor (CMOS) technology have been reported. However, post-fabrication processes are essential for all classes of CMOS biochips, requiring biocompatible electrode deposition and circuit encapsulation.In this work, we present an amorphous silicon (a-Si) thin film transistor (TFT) array based sensing approach, which greatly simplifies the fabrication procedures and even decreases the cost of the biosensor. The device contains several identical sensor pixels with amplifiers to boost the sensitivity. Ring oscillator and logic circuits are also integrated to achieve different measurement methodologies, including electro-analytical methods such as amperometric and cyclic voltammetric modes. The system also supports different operational modes. For example, depending on the required detection arrangement, a sample droplet could be placed on the sensing pads or the device could be immersed into the sample solution for real time in-situ measurement. The entire system is designed and fabricated using a low temperature TFT process that is compatible to plastic substrates. No additional processing is required prior to biological measurement. A Cr/Au double layer is used for the biological-electronic interface. The success of the TFT-based system used in this work will open new avenues for flexible label-free or low-cost disposable biosensors.


2006 ◽  
Vol 910 ◽  
Author(s):  
Jaehyun Moon ◽  
Dong-Jin Park ◽  
Choong-Heui Chung ◽  
Yong-Hae Kim ◽  
Sun Jin Yun ◽  
...  

AbstractCompared to plastic, from the view point of ultra low temperature poly-Si (ULTPS) processes for realizing flexible active matrix organic light emitting diode (AM-OLED) display, SSF offers high thermal resistance and chemical stability, and lithography stability. As SSF is stiffer than plastic film, SSF is expected to reduce stress which originates from difference in coefficient of thermal expansion. However, SSF substrate itself also bears surface roughness problem, which necessitates an appropriate planarization step. Also to fully integrate both the drive circuits and the pixel thin-film transistor(TFT)s in a monolithic complementary metal-oxide-semiconductor (CMOS) technology high mobility is required, calling for poly-Si usage.We will deal with the planarization process, and then address various processing issues. Especially, we will demonstrate our successful SLS of Si on SSF substrates. Finally we show the device performances. All fabrication temperatures were kept below 200 oC to meet a ULTPS process.Due to the rolling process for manufacturing foils, the SSF surface is rough. We have measured average roughness of 500 nm, respectively. With benzocyclobutene (BCB), we have successfully planarized the surface with average roughness was less than 0.5 nm.Our TFT's active layer was obtained by laser crystallizing amorphous Si (a-Si) films. To obtain a high quality gate dielectric film, we formed a SiO2 film using an O2 plasma treatment on the surface of the poly-Si film and then deposited Al2O3 film by plasma enhanced atomic layer deposition. Then gate metal was deposited and patterned. Source and drain regions were p+ doped by ion implantation to form a self-aligned gate structure. We have used SiNx film as interlayer dielectrics.Briefly we discuss a practical approach for realizing SLS on a SiO2 buffer. The Si-on-SiO2 layer stacking is energetically unstable. Should have not controlled the heat during laser crystallization, liquid Si would recede to expose the SiO2 layer. Dewetting is suppressed by adjusting the buffer density, and densifying the a-Si film. To implement the SLS, we have optimally conjugated the densities of the buffer film and the a-Si film to produce Si grains with sizes of ~6 ¥ìm on a BCB planarized SSF.Our p-channel TFT transfer performance exhibits a field effect mobility (¥ì) of 95 cm2/Vs, a threshold voltage (Vt) of -3 V and a sub-threshold swing(S-S) of 0.5 V/dec.. The off-current level is ~ 10 pA at drain voltage (Vd) of -1V and the Ion/Ioff is 106 . Especially our stable Vt consents to the electrical stability for driving displays. This feature might be attributed to the improved interface between the active layer and the gate dielectrics by plasma oxidation.


2016 ◽  
Vol 3 (1) ◽  
pp. 14-23 ◽  
Author(s):  
Venkateshwarlu Sarangi ◽  
Srinivas Gandla

We report combustion synthesis of polycrystalline Aluminium doped zinc oxide (AZO) at low temperature for next generation low cost, flexible thin film transistor (TFT) application. Solution processed AZO thin film has been characterized by X ray diffraction and atomic force microscopy to confirm crystallinity. In this research work TFT with solution processed AZO as channel layer has been fabricated on both rigid and flexible substrate which exhibits excellent electrical stability and improved field effect mobility of 1.2 cm2V-1S-1, threshold voltage of 15 V and on-off ratio of 106as compared to pure ZnO based TFT. All the measurements have been carried out with varying Al concentration. Moreover, variation in defect density of AZO with Al concentration which essentially causes significant change in TFT’s performance is demonstrated by chemical composition and bonding state analysis using XPS. Our results suggest that low temperature solution processed AZO TFTs have a potential for low cost, flexible and transparent electronic applications.


2015 ◽  
Vol 28 (3) ◽  
pp. 353-355 ◽  
Author(s):  
Hea Jeong Cheong ◽  
Shintaro Ogura ◽  
Manabu Yoshida ◽  
Hirobumi Ushijima ◽  
Nobuko Fukuda ◽  
...  

Electronics ◽  
2021 ◽  
Vol 10 (9) ◽  
pp. 1099
Author(s):  
Ye-Ji Han ◽  
Se Hyeong Lee ◽  
So-Young Bak ◽  
Tae-Hee Han ◽  
Sangwoo Kim ◽  
...  

Conventional sol-gel solutions have received significant attention in thin-film transistor (TFT) manufacturing because of their advantages such as simple processing, large-scale applicability, and low cost. However, conventional sol-gel processed zinc tin oxide (ZTO) TFTs have a thermal limitation in that they require high annealing temperatures of more than 500 °C, which are incompatible with most flexible plastic substrates. In this study, to overcome the thermal limitation of conventional sol-gel processed ZTO TFTs, we demonstrated a ZTO TFT that was fabricated at low annealing temperatures of 350 °C using self-combustion. The optimized device exhibited satisfactory performance, with μsat of 4.72 cm2/V∙s, Vth of −1.28 V, SS of 0.86 V/decade, and ION/OFF of 1.70 × 106 at a low annealing temperature of 350 °C for one hour. To compare a conventional sol-gel processed ZTO TFT with the optimized device, thermogravimetric and differential thermal analyses (TG-DTA) and X-ray photoelectron spectroscopy (XPS) were implemented.


1993 ◽  
Vol 297 ◽  
Author(s):  
Byung Chul Ahn ◽  
Jeong Hyun Kim ◽  
Dong Gil Kim ◽  
Byeong Yeon Moon ◽  
Kwang Nam Kim ◽  
...  

The hydrogenation effect was studied in the fabrication of amorphous silicon thin film transistor using APCVD technique. The inverse staggered type a-Si TFTs were fabricated with the deposited a-Si and SiO2 films by the atmospheric pressure (AP) CVD. The field effect mobility of the fabricated a-Si TFT is 0.79 cm2/Vs and threshold voltage is 5.4V after post hydrogenation. These results can be applied to make low cost a-Si TFT array using an in-line APCVD system.


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