An Online Task Placement Algorithm Based on MER Enumeration for Partially Reconfigurable Device

2016 ◽  
Vol E99.A (7) ◽  
pp. 1345-1354 ◽  
Author(s):  
Tieyuan PAN ◽  
Li ZHU ◽  
Lian ZENG ◽  
Takahiro WATANABE ◽  
Yasuhiro TAKASHIMA
Keyword(s):  
Placement Algorithm ◽  
Task Placement ◽  
Reconfigurable Device

scholarly journals A Fast Online Task Placement Algorithm for Three-Dimensional Dynamic Partial Reconfigurable Devices

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 36903-36918 ◽  
Author(s):  
Tingyu Zhou ◽  
Tieyuan Pan ◽  
Michael Conrad Meyer ◽  
Yiping Dong ◽  
Takahiro Watanabe
Keyword(s):  
Three Dimensional ◽  
Reconfigurable Devices ◽  
Placement Algorithm ◽  
Task Placement

Theoretical Analysis of Resource Swap for Reuse Based Hardware Task Scheduling in Reconfigurable System

2011 ◽  
Vol 219-220 ◽  
pp. 1679-1682
Author(s):  
Ting Ting Fu ◽  
Peng Liu
Keyword(s):  
Theoretical Analysis ◽  
Task Scheduling ◽  
High Performance ◽  
Low Cost ◽  
Reconfigurable Logic ◽  
Reconfigurable System ◽  
Placement Algorithms ◽  
Task Placement ◽  
Reconfigurable Device

In reconfigurable system, hardware task placement algorithms are trying to find rectangle of available reconfigurable logic units in a fast manner. Furthermore, low cost and less fragmentation are another two metrics of high performance algorithm. In previous work we proposed a Transformable Vertexes Information based Algorithm (TVIA) for online task placement in reconfigurable system. In this paper, based on TVIA, we adopt Resource Swap scheme for reuse based hardware task scheduling. Hardware tasks will remain in the reconfigurable device after execution. Only when there is no enough space left for incoming tasks will previous tasks been swapped out from configurable device. This paper discusses the principle and procedure of resource swap management and compares several algorithms using simulation.

scholarly journals An FPGA Task Placement Algorithm Using Reflected Binary Gray Space Filling Curve

2014 ◽  
Vol 2014 ◽  
pp. 1-7 ◽  
Author(s):  
Senoj Joseph Olakkenghil ◽  
K. Baskaran
Keyword(s):  
Search Algorithm ◽  
Space Filling ◽  
New Approach ◽  
Space Filling Curve ◽  
Reconfigurable Devices ◽  
Placement Algorithm ◽  
Filling Curve ◽  
Task Placement ◽  
Online Placement ◽  
Best Fit

With the arrival of partial reconfiguration technology, modern FPGAs support tasks that can be loaded in (removed from) the FPGA individually without interrupting other tasks already running on the same FPGA. Many online task placement algorithms designed for such partially reconfigurable systems have been proposed to provide efficient and fast task placement. A new approach for online placement of modules on reconfigurable devices, by managing the free space using a run-length based representation. This representation allows the algorithm to insert or delete tasks quickly and also to calculate the fragmentation easily. In the proposed FPGA model, the CLBs are numbered according to reflected binary gray space filling curve model. The search algorithm will quickly identify a placement for the incoming task based on first fit mode or a fragmentation aware best fit mode. Simulation experiments indicate that the proposed techniques result in a low ratio of task rejection and high FPGA utilization compared to existing techniques.

ROUTING AWARE PLACEMENT ALGORITHM AND EFFICIENT FREE SPACE MANAGEMENT FOR RECONFIGURABLE SYSTEMS

2010 ◽  
Vol 19 (06) ◽  
pp. 1217-1234
Author(s):  
MOHAMMAD ESMAEILDOUST ◽  
ALI ZAKEROLHOSSEINI
Keyword(s):  
Routing Algorithm ◽  
Communication Channels ◽  
Parallel Execution ◽  
Effective Management ◽  
New Approach ◽  
Space Management ◽  
Reconfigurable Devices ◽  
Placement Algorithm ◽  
Task Placement

In partially reconfigurable devices like FPGA, logic resources and communication channels can be reconfigured without affecting other section of the device. This allows parallel execution of multiple tasks on a FPGA. Due to limited resources on a FPGA, an effective management for efficient execution of tasks is required. We present a new approach for management of FPGA logic resources and also communication channels in an online task placement. The approach creates communication channels between the tasks and also tasks with I/O elements without requiring extra computation overhead. We present a fast algorithm for searching MERs for management of FPGA space. Then, we present a exact routing algorithm to find distance and create exact path between two set of tasks. A new fitting strategy based on the rate of communication between the tasks is also presented. The results indicate the proposed strategy and also its combination with some other known strategies can improve the quality of placement.

scholarly journals An Efficient Algorithm for On-line Placement of Partially Reconfigurable Devices

2015 ◽  
pp. 310-314
Author(s):  
U.Lenin Marksia ◽  
S. Darwin
Keyword(s):  
Efficient Algorithm ◽  
Time Axis ◽  
Reconfigurable Devices ◽  
Line Placement ◽  
On Line ◽  
Future Task ◽  
Complete Set ◽  
Placement Algorithm ◽  
Task Placement ◽  
Online Placement

Partial Runtime Reconfigurable (PRTR) FPGAs allow HW tasks to be placed and removed dynamically at runtime. We make two contributions in this paper. First, we present an efficient algorithm for finding the complete set of Maximal Empty Rectangles on a 2D PRTR FPGA, which is useful for online placement and scheduling of HW tasks. The algorithm is incremental and only updates the local region affected by each task addition or removal event. Second, we present an efficient online deadline-constrained task placement algorithm for minimizing area fragmentation on the FPGA by using an area fragmentation metric that takes into account probability distribution of sizes of future task arrivals as well as the time axis. The techniques presented in this paper are useful in an operating system for runtime reconfigurable FPGAs to manage the HW resources on the FPGA when HW tasks that arrive and finish dynamically at runtime. Online placement methods are required that achieve a high placement quality and lead to efficient implementation.

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