A self-adaptive on-line task placement algorithm for partially reconfigurable systems

2008 ◽  
Author(s):  
Yi Lu ◽  
Thomas Marconi ◽  
Georgi Gaydadjiev ◽  
Koen Bertels ◽  
Roel Meeuws
Keyword(s):  
Reconfigurable Systems ◽  
On Line ◽  
Placement Algorithm ◽  
Task Placement ◽  
Self Adaptive

scholarly journals An Efficient Algorithm for On-line Placement of Partially Reconfigurable Devices

2015 ◽  
pp. 310-314
Author(s):  
U.Lenin Marksia ◽  
S. Darwin
Keyword(s):  
Efficient Algorithm ◽  
Time Axis ◽  
Reconfigurable Devices ◽  
Line Placement ◽  
On Line ◽  
Future Task ◽  
Complete Set ◽  
Placement Algorithm ◽  
Task Placement ◽  
Online Placement

Partial Runtime Reconfigurable (PRTR) FPGAs allow HW tasks to be placed and removed dynamically at runtime. We make two contributions in this paper. First, we present an efficient algorithm for finding the complete set of Maximal Empty Rectangles on a 2D PRTR FPGA, which is useful for online placement and scheduling of HW tasks. The algorithm is incremental and only updates the local region affected by each task addition or removal event. Second, we present an efficient online deadline-constrained task placement algorithm for minimizing area fragmentation on the FPGA by using an area fragmentation metric that takes into account probability distribution of sizes of future task arrivals as well as the time axis. The techniques presented in this paper are useful in an operating system for runtime reconfigurable FPGAs to manage the HW resources on the FPGA when HW tasks that arrive and finish dynamically at runtime. Online placement methods are required that achieve a high placement quality and lead to efficient implementation.

scholarly journals A Fast Online Task Placement Algorithm for Three-Dimensional Dynamic Partial Reconfigurable Devices

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 36903-36918 ◽  
Author(s):  
Tingyu Zhou ◽  
Tieyuan Pan ◽  
Michael Conrad Meyer ◽  
Yiping Dong ◽  
Takahiro Watanabe
Keyword(s):  
Three Dimensional ◽  
Reconfigurable Devices ◽  
Placement Algorithm ◽  
Task Placement

Implementation of High Speed Self Switching Frequency Agile RADAR

2013 ◽  
Vol 3 (1) ◽  
pp. 11
Author(s):  
K Jansi Lakshmi ◽  
K Surya Narayana Reddy
Keyword(s):  
High Speed ◽  
Switching Frequency ◽  
Frequency Diversity ◽  
Description Language ◽  
General Application ◽  
Frequency Agile ◽  
On Line ◽  
Hardware Description ◽  
Effective Function ◽  
Self Adaptive

<div class="WordSection1"><p><strong><a href="mailto:[email protected]"></a></strong></p></div><strong> </strong>The radar has to resist diversified jamming; High Speed self-adaptive frequency   agility   is   an   important   and   effective function  for radars to resist jamming.  The procedure to achieve this function are described, and the function is realized with FPGA using Hardware description  Language, the validity is proved by on- line sampling and simulation. The High speed self-adaptive frequency agility module can analyze the type of jamming to select  transmitting  frequency  to avoid the frequencies which have interference, under frequency       diversity  and  fixed  frequency, respectively. The   general   application   on   a   searching   radar shows that the module has good real-time and anti- jamming capacity.

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