Low-Voltage Wireless Analog CMOS Circuits toward 0.5V Operation

Toshimasa MATSUOKA; Jun WANG; Takao KIHARA; Hyunju HAM; Kenji TANIGUCHI

doi:10.1587/transfun.e93.a.356

Low-Voltage Wireless Analog CMOS Circuits toward 0.5V Operation

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e93.a.356 ◽

2010 ◽

Vol E93-A (2) ◽

pp. 356-366 ◽

Cited By ~ 10

Author(s):

Toshimasa MATSUOKA ◽

Jun WANG ◽

Takao KIHARA ◽

Hyunju HAM ◽

Kenji TANIGUCHI

Keyword(s):

Low Voltage ◽

Cmos Circuits ◽

Analog Cmos Circuits ◽

Analog Cmos

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Techniques for very low-voltage operation of continuous-time analog CMOS circuits

17th International Conference on VLSI Design. Proceedings. ◽

10.1109/icvd.2004.1260900 ◽

2004 ◽

Cited By ~ 5

Author(s):

J. Ramirez-Angulo ◽

R. Gonzalez-Carvajal ◽

A. Lopez-Martin

Keyword(s):

Continuous Time ◽

Low Voltage ◽

Cmos Circuits ◽

Analog Cmos Circuits ◽

Low Voltage Operation ◽

Analog Cmos

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The gm/ID Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits

10.1007/978-0-387-47101-3 ◽

2010 ◽

Cited By ~ 40

Author(s):

Paul Jespers

Keyword(s):

Low Voltage ◽

Cmos Circuits ◽

Analog Cmos Circuits ◽

Analog Cmos

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Parameter Space Exploration for Analog Circuit Design Using Enhanced Bee Colony Algorithm

Journal of Circuits System and Computers ◽

10.1142/s0218126619501536 ◽

2019 ◽

Vol 28 (09) ◽

pp. 1950153

Author(s):

Subhash Patel ◽

Rajesh A. Thakker

Keyword(s):

Artificial Bee Colony Algorithm ◽

Artificial Bee Colony ◽

Analog Circuit ◽

Low Voltage ◽

Cmos Circuits ◽

Analog Cmos Circuits ◽

Design And Optimization ◽

Bee Colony ◽

Analog Cmos ◽

Competitive Algorithms

In this work, novel swarm optimization algorithm based on the Artificial Bee Colony (ABC) algorithm called Enhanced Artificial Bee Colony (EABC) algorithm is proposed for the design and optimization of the analog CMOS circuits. The new search strategies adopted improve overall performance of the proposed algorithm. The performance of EABC algorithm is compared with other competitive algorithms such as ABC, GABC (G-best Artificial Bee Colony Algorithm) and MABC (Modified Artificial Bee Colony Algorithm) by designing three CMOS circuits; Two-stage operational amplifier, low-voltage bulk driven OTA and second generation low-voltage current conveyor in 0.13 [Formula: see text]m and 0.09[Formula: see text][Formula: see text]m CMOS technologies. The obtained results clearly indicate that the performance of EABC algorithm is better than other mentioned algorithms and it can be an effective approach for the automatic design of the analog CMOS circuits.

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