Effects of Tisix/Tinx/Al Contact Metallization Process on the Shallow Junction Related Properties

1987 ◽  
Vol 92 ◽  
Author(s):  
S.W. Sun ◽  
F. Pintchovski ◽  
P.J. Tobin ◽  
R.L. Hance
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Annealing Temperature ◽  
Film Stress ◽  
Silicide Layer ◽  
Contact Metallization ◽  
Barrier Metal ◽  
Al Metallization ◽  
Metallization Process ◽  
Thermal Stability Of

ABSTRACTAn extremely reliable TiSix/TiNx diffusion barrier was formed by the rapid thermal annealing of a thin Ti layer which was sputtered into the contacts before Al metallization. The effects of this barrier metal process on the material properties of heavily implanted n+ and p+ regions were studied. The TiNx-to-TiSix thickness ratio is determined by the dominant reaction at the sintering temperature. Arsenic implanted in the substrate tends to substantially retard the silicidation of Ti. Substantial redistribution of both B and As across the silicide layer was observed during rapid thermal annealing. Film stress was found to be greatly affected by the annealing temperature. Contact resistance, contact electromigration and thermal stability of the structure were also investigated.

scholarly journals Synthesis of Ge1−xSnx Alloy Thin Films by Rapid Thermal Annealing of Sputtered Ge/Sn/Ge Layers on Si Substrates

Materials ◽  
2018 ◽  
Vol 11 (11) ◽  
pp. 2248 ◽  
Author(s):  
Hadi Mahmodi ◽  
Md Hashim ◽  
Tetsuo Soga ◽  
Salman Alrokayan ◽  
Haseeb Khan ◽  
...  
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Near Infrared ◽  
Annealing Temperature ◽  
Solid Phase ◽  
Infrared Region ◽  
Alloy Formation ◽  
Phase Mixing ◽  
Si Substrates ◽  
Msm Photodetector

In this work, nanocrystalline Ge1−xSnx alloy formation from a rapid thermal annealed Ge/Sn/Ge multilayer has been presented. The multilayer was magnetron sputtered onto the Silicon substrate. This was followed by annealing the layers by rapid thermal annealing, at temperatures of 300 °C, 350 °C, 400 °C, and 450 °C, for 10 s. Then, the effect of thermal annealing on the morphological, structural, and optical characteristics of the synthesized Ge1−xSnx alloys were investigated. The nanocrystalline Ge1−xSnx formation was revealed by high-resolution X-ray diffraction (HR-XRD) measurements, which showed the orientation of (111). Raman results showed that phonon intensities of the Ge-Ge vibrations were improved with an increase in the annealing temperature. The results evidently showed that raising the annealing temperature led to improvements in the crystalline quality of the layers. It was demonstrated that Ge-Sn solid-phase mixing had occurred at a low temperature of 400 °C, which led to the creation of a Ge1−xSnx alloy. In addition, spectral photo-responsivity of a fabricated Ge1−xSnx metal-semiconductor-metal (MSM) photodetector exhibited its extending wavelength into the near-infrared region (820 nm).

Ajustement par recuits rapides RTA (rapid thermal annealing) des contraintes dans des couches minces de tungstène utilisées comme absorbant pour des masques à rayons X

1991 ◽  
Vol 69 (3-4) ◽  
pp. 451-455 ◽  
Author(s):  
H. Lafontaine ◽  
J. F. Currie ◽  
S. Boily ◽  
M. Chaker ◽  
H. Pépin
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Annealing Temperature ◽  
Rf Power ◽  
X Ray ◽  
Stress Changes ◽  
Different Temperatures ◽  
Absorbing Layer ◽  
Good Agreement ◽  
Sputtering System

Tungsten thin films are deposited with a triode sputtering system in order to obtain an absorbing layer for X-ray masks. The mechanical stress is studied as a function of different pressure and RF power conditions during deposition. Rapid thermal annealing at different temperatures and durations is performed in order to produce films under low compressive stress. We observe that the stress changes occur over the time scale of seconds at the annealing temperature and that the corresponding activation energies are low (60 meV). Grain growth in a preferred orientation explains the observed changes in stress. The magnitude in the change of stress is in good agreement with a model proposed by Hoffman et al. relating the stress to grain size and grain boundary dimensions. [Journal translation]

scholarly journals Effect of rapid thermal annealing on structural and optical properties of ZnS thin films fabricated by RF magnetron sputtering technique

2019 ◽  
Vol 14 (1) ◽  
pp. 53-63 ◽  
Author(s):  
M. S. Bashar ◽  
Rummana Matin ◽  
Munira Sultana ◽  
Ayesha Siddika ◽  
M. Rahaman ◽  
...  
Keyword(s):  
Thin Films ◽  
Magnetron Sputtering ◽  
Carrier Concentration ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Annealing Temperature ◽  
Annealing Treatment ◽  
Localized States ◽  
Stoichiometric Ratio ◽  
Deposited Films

AbstractThe ZnS thin films have been deposited by radio frequency magnetron sputtering at room temperature. Post-deposition rapid thermal annealing treatment was done for the films deposited at different powers ranging from 70 to 100 W. One peak is observed for as-deposited and annealed thin films at around 28.48° corresponding to the (111) reflection plane indicating a zincblende structure. The overall intensity of the peaks and the FWHM values of as-deposited films increased after annealing corresponding to the increase in crystallinity. The optical energy bandgap is found in the range of 3.24–3.32 eV. With increasing annealing temperature, the decrease in the Urbach energy values indicating a decrease in localized states which is in good agreement with the XRD results where the crystallinity increased. The surface morphology of the films seems to be composed of Nano-granules with a compact arrangement. Apparently, the grain size increases in the deposited films as annealing temperature increases. The compositional ratio attained close to the stoichiometric ratio of 1:1 after annealing. From the Hall effect measurement, the carrier concentration and mobility are found to increase after annealing. The high carrier concentration and mobility also comply with structural and optical analysis. Best results are found for the film annealed at 400 °C deposited at 90 W.

Comparison Between Rapid Thermal and Furnace Annealing for A-Si Solid Phase Crystallization

1996 ◽  
Vol 424 ◽  
Author(s):  
Reece Kingi ◽  
Yaozu Wang ◽  
Stephen J. Fonash ◽  
Osama Awadelkarim ◽  
John Mehlhaff
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Annealing Temperature ◽  
Solid Phase ◽  
Growth Time ◽  
Crystallization Time ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Lower Growth ◽  
Transient Time

AbstractRapid thermal annealing and furnace annealing for the solid phase crystallization of amorphous silicon thin films deposited using PECVD from argon diluted silane have been compared. Results reveal that the crystallization time, the growth time, and the transient time are temperature activated, and that the resulting polycrystalline silicon grain size is inversely proportional to the annealing temperature, for both furnace annealing and rapid thermal annealing. In addition, rapid thermal annealing was found to result in a lower transient time, a lower growth time, a lower crystallization time, and smaller grain sizes than furnace annealing, for a given annealing temperature. Interestingly, the transient time, growth time, and crystallization time activation energies are much lower for rapid thermal annealing, compared to furnace annealing.We propose two models to explain the observed differences between rapid thermal annealing and furnace annealing.

Rapid Thermal Annealing of Ion Implanted p-n Junction in Silicon

1985 ◽  
Vol 52 ◽  
Author(s):  
C. Ho ◽  
R. Kwor ◽  
C. Araujo ◽  
J. Gelpey
Keyword(s):  
Leakage Current ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Dwell Time ◽  
Annealing Temperature ◽  
Current Analysis ◽  
Junction Depth ◽  
Leakage Currents ◽  
Dopant Activation ◽  
Secondary Ion

ABSTRACTThe rapid thermal annealing (RTA) of p+n and n+p diodes, fabricated by the LOCOS process, and its subsequent effects on junction leakage current, junction depth and dopant activation were investigated. The reverse bias diode leakage currents of implanted Si <100> samples (As+: 60 KeY, 5×1014 5×1015 cm−2, B+: 25 KeV, l×1014, l×1015 cm−2 and BF2+: 45 KeV, 1×1015cm−2 ) were measured as functions of annealing temperature, and dwell time. The annealing was performed using an Eaton RTA system (Nova ROA-400) at temperatures ranging from 950 °C to 1150 °C. Annealing times ranged from 0.2 sec. to 10 sec. The results from the diode leakage current analysis are correlated with those from Secondary Ion Mass Spectroscopy (SIMS) and differential Hall measurements. The reverse-biased leakage currents from the RTA-treated samples are compared with those from furnace-annealed samples.

Integrated Processinyg of Silicided Shallow Junctions using Rapid Thermal Annealing Prior to Dopant Activation

1989 ◽  
Vol 146 ◽  
Author(s):  
Leonard Rubin ◽  
Nicole Herbots ◽  
JoAnne Gutierrez ◽  
David Hoffman ◽  
Di Ma
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Titanium Silicide ◽  
Silicon Substrates ◽  
Sheet Resistivity ◽  
Furnace Annealing ◽  
Dopant Activation ◽  
Silicide Layer ◽  
Low Leakage ◽  
Sputter Deposited

ABSTRACTA method for producing shallow silicided diodes for MOS devices (with junction depths of about 0.1 µm), by implanting after forming the silicide layer was investigated. The key to this integrated process is the use of rapid thermal annealing (RTA) to activate the dopants in the silicon, so that there is very little thermal broadening of the implant distribution. Self-aligned titanium silicide (TiSi2) films with thicknesses ranging from 40 to 80 nm were grown by RTA of sputter deposited titanium films on silicon substrates. After forming the TiSi2, arsenic and boron were implanted. A second RTA step was used after implantation to activate these dopants. It was found that implanting either dopant caused a sharp increase in the sheet resistivity of the TiSi2. The resistivity can be easily restored to its original value (about 18 µΩ-cm) by a post implant RTA anneal. RBS analysis showed that arsenic diffuses rapidly in the TiSi2 during RTA at temperatures as low as 600°C. SIMS data indicated that boron was not mobile up to temperatures of 900°C, possibly because it forms a compound with the titanium which precipitates in the TiSi 2. Coalescence of TiSi2 occurs during post implant furnace annealing, leading to an increase in the sheet resistivity. The amount of coalescence depends on the film thickness, but not on whether or not the film had been subject to implantation. Spreading resistance profiling data showed that both arsenic and boron diffused into the TiSi2 during furnace annealing, reducing the surface concentrations of dopant at the TiSi2/Si interface. Both N+/P and P+/N diodes formed by this technique exhibited low leakage currents after the second RTA anneal. This is attributed to removal of the implant damage by the RTA. In summary, the second RTA serves the dual purpose of removing implant damage in the TiSi2 and creating the shallow junction by dopant activation.

Epitaxial Growth and Thermal Stability of CoSi2 Layer on (100) Si from Co-C Films without Capping Layer

1999 ◽  
Vol 564 ◽  
Author(s):  
Hwa Sung Rhee ◽  
Dong Kyun Sohn ◽  
Byung Tae Ahn
Keyword(s):  
Thermal Stability ◽  
Epitaxial Growth ◽  
Leakage Current ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Carbon Film ◽  
Si Substrate ◽  
Capping Layer ◽  
Potential Applicability ◽  
Thermal Stability Of

AbstractA uniform epitaxial CoSi2 layer was grown on (100) Si substrate by rapid thermal annealing at 800°C in N2 ambient without capping layers from an amorphous cobalt-carbon film. The amorphous cobalt-carbon film was deposited on Si substrate by the pyrolysis of cyclopentadienyl dicarbonyl cobalt. Co(η5-C5H5)(CO)2. at 350°C. The leakage current measured on the junction, fabricated with the epitaxial CoSi2 layer and annealed at 1000°C for 30 s. was as low as that of the as-fabricated junction without silicide. indicating that epitaxial (100) CoSi2 is thermally stable at temperatures even above 1000°C and has a potential applicability to the salicide process in sub-half micron devices.

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