Fabrication of Si-Gate CMOS Devices In A Heteroepitaxial Si/Caf2/Si Structure

1987 ◽  
Vol 91 ◽  
Author(s):  
Hiroshi Onoda ◽  
Masayoshi Sasaki ◽  
Teruo Katoh ◽  
Norio Hirashita
Keyword(s):  
High Speed ◽  
Solid Phase ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Cmos Inverter ◽  
Ion Channeling ◽  
Propagation Delays ◽  
Segregation Effect ◽  
Recent Developments ◽  
Si Films

ABSTRACTThe results of recent developments on device fabrication in a heteroepitaxial Si/CaF2/Si structure have been presented and discussed. A high quality heteroepitaxial Si/CaF2/Si structure has been obtained by successive molecular beam epitaxy of CaF2 and Si. The epitaxial Si film on CaF2/Si structure has an ion channeling minimum yield of 7 %. It was found, however, that Ca and F segregated at the surface of epitaxial Si films. A possibility of reducing the segregation effect by the use of solid phase epitaxy of Si has been proposed.Si-gate CMOS devices have been successfully fabricated in a Si/CaF2/Si structure with alt improved CMOS proress. The maximum effective mobiliiies are about 570 cm2/V.sec and 240 cm2/V.sec for n-channel and p-channel transistors, respectively. Propagation delays below 360 ps have been obtained for CMOS inverter chains with Leff = 2 μm. These results indicate that the Si/CaF2/Si structure has potential for the fabrication of high-speed silicon-on-insulator devices.

Modifying Crystallographic Orientations of Polycrystalline Si Films Using Ion Channeling

1984 ◽  
Vol 35 ◽  
Author(s):  
K. T-Y. Kung ◽  
R. B. Ivepson ◽  
R. Reif
Keyword(s):  
Ion Implantation ◽  
Solid Phase ◽  
Chemical Vapor ◽  
Silicon On Insulator ◽  
Furnace Annealing ◽  
Ion Channeling ◽  
Amorphous Substrates ◽  
Pressure Chemical ◽  
Si Films ◽  
Polycrystalline Silicon Films

ABSTRACTPolycrystalline silicon films 4800 Å thick deposited via low pressure chemical vapor deposition on oxidized silicon wafers have been amorphized by silicon ion implantation and subsequently recrystallized at 700°C. Due to channeling of the ions through grains whose <110> axes were sufficiently parallel to the beam, these grains survived the implantation step and acted as seed crystals for the solid-phase epitaxial regrowth of the film. This work suggests the feasibility of combining ion implantation and furnace annealing to generate large-grain, uniformly oriented polycrystal1ine films on amorphous substrates. It is a potential low-temperature silicon-on-insulator technology.

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

Applications of Solid Phase Doping in Manufacturing MOS Devices

1990 ◽  
Vol 182 ◽  
Author(s):  
S. F. Gong ◽  
H. T. G. Hentzell ◽  
A. Robertsson
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Field Effect Transistors ◽  
Solid Phase ◽  
Mos Devices ◽  
Transmission Electron ◽  
Heavily Doped ◽  
Si Films ◽  
Secondary Ion ◽  
Si Wafer

AbstractSolid phase doping from Sb heavily-doped Si films has been studied by using transmission electron microscopy and secondary ion mass spectroscopy. Based on the results of the material study, metal-oxidesemiconductor field effect transistors (MOSFETs) made on a (100) Si wafer, and thin film transistors have been implemented. The technique for the MOSFETs suggests the possibility for making small dimensional and high speed integrated circuits by using the method of solid phase doping.

Precipitation in silicon-on-insulator material during high- temperature annealing

1987 ◽  
Vol 45 ◽  
pp. 254-255
Author(s):  
S. J. Krause ◽  
C. O. Jung ◽  
S.R. Wilson
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Annealing Time ◽  
High Speed ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Precipitate Size ◽  
High Dose ◽  
High Temperature Annealing ◽  
Implantation Energy

Silicon-on-insulator (SOI) structure by high dose oxygen implantation (SIMOX) has excellent potential for use in radiation hardened and high speed integrated circuits. Device fabrication in SIMOX requires a high quality superficial Si layer above the buried oxide layer. Previously we reported on the effect of heater temperature, background doping, and annealing cycle on precipitate size, density, and location in the superficial Si layer. Precipitates were not eliminated with our processing conditions, but various authors have recently reported that high temperature annealing of SIMOX, from 1250°C to 1405°C, eliminates virtually all precipitates in the superficial Si layer. However, in those studies there were significant differences in implantation energy and dose and also annealing time and temperature. Here we are reporting on the effect of annealing time and temperature on the formation and changes in precipitates.

Reduction of Ca and F Segregated at the Surface of a Si/CaF2/Si(100) Structure By Solid Phase Epitaxy of Si

1985 ◽  
Vol 53 ◽  
Author(s):  
Masayoshi Sasaki ◽  
Hiroshi Onoda ◽  
Norio Hirashita
Keyword(s):  
Molecular Beam ◽  
Solid Phase ◽  
High Energy ◽  
Solid Phase Epitaxy ◽  
Si Substrates ◽  
Segregation Effect ◽  
Order Of Magnitude ◽  
Amorphous Si ◽  
Si Epitaxy ◽  
Si Films

ABSTRACTEpitaxial Si films have been grown on single crystalline CaF2 on (l00)Si substrates by molecular beam epitaxy(MBE) or combination of MBE and solid phase epitaxy(SPE) of deposited amorphous Si(a-Si). It has been found that Ca and F segregate at the surface of the Si grown by MBE. The high energy electron diffraction (RHEED) patterns from the Si surface show the superstructures which are caused by the existence of Ca and F at the Si surface. To reduce the segregation effect, SPE process has been successfully applied to Si epitaxy. The Si SPE performed on top of the MBE Si layer reduces the Ca concentration at the Si surface by an order of magnitude, although the segregation effect is not completely suppressed.

Analysis of Silicon-On-Insulator Structures Formed By Oxygen Ion Implantation

1985 ◽  
Vol 43 ◽  
pp. 300-301
Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love
Keyword(s):  
Ion Implantation ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Dose ◽  
Crystal Silicon ◽  
Oxygen Ion ◽  
Oxygen Ion Implantation

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

Microstructure of sputter deposited Ni-Sb ohmic contacts on GaAs

1989 ◽  
Vol 47 ◽  
pp. 450-451
Author(s):  
S. Yegnasubramanian ◽  
V.C. Kannan ◽  
R. Dutto ◽  
P.J. Sakach
Keyword(s):  
High Performance ◽  
Ohmic Contacts ◽  
Surface Defects ◽  
Pure Metal ◽  
Device Fabrication ◽  
Native Oxide ◽  
Metal Thin Films ◽  
Recent Developments ◽  
Different Temperatures ◽  
Sputter Deposited

Recent developments in the fabrication of high performance GaAs devices impose crucial requirements of low resistance ohmic contacts with excellent contact properties such as, thermal stability, contact resistivity, contact depth, Schottky barrier height etc. The nature of the interface plays an important role in the stability of the contacts due to problems associated with interdiffusion and compound formation at the interface during device fabrication. Contacts of pure metal thin films on GaAs are not desirable due to the presence of the native oxide and surface defects at the interface. Nickel has been used as a contact metal on GaAs and has been found to be reactive at low temperatures. Formation Of Ni2 GaAs at 200 - 350C is reported and is found to grow epitaxially on (001) and on (111) GaAs, but is shown to be unstable at 450C. This paper reports the investigations carried out to understand the microstructure, nature of the interface and composition of sputter deposited and annealed (at different temperatures) Ni-Sb ohmic contacts on GaAs by TEM. Attempts were made to correlate the electrical properties of the films such as the sheet resistance and contact resistance, with the microstructure. The observations are corroborated by Scanning Auger Microprobe (SAM) investigations.

An Overview of 300 mm SOI Starting Wafer Quality and Its Yield Detractors

2005 ◽  
Author(s):  
Pei Y. Tsai ◽  
Junedong Lee ◽  
Paul Ronsheim ◽  
Lindsay Burns ◽  
Richard Murphy ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Device Fabrication ◽  
Sampling Plan ◽  
Silicon On Insulator ◽  
Manufacturing Processes ◽  
Circuit Performance ◽  
Characterization Techniques ◽  
Wafer Manufacturing

Abstract A stringent sampling plan is developed to monitor and improve the quality of 300mm SOI (silicon on insulator) starting wafers procured from the suppliers. The ultimate goal is to obtain the defect free wafers for device fabrication and increase yield and circuit performance of the semiconductor integrated circuits. This paper presents various characterization techniques for QC monitor and examples of the typical defects attributed to wafer manufacturing processes.

Graphene Oxide and Its Derivatives: Their Synthesis and Use in Organic Synthesis

2019 ◽  
Vol 23 (2) ◽  
pp. 188-204 ◽  
Author(s):  
Xiangjun Peng ◽  
Xianyun Xu ◽  
Fujiang Huang ◽  
Qian Liu ◽  
Liangxian Liu
Keyword(s):  
Graphene Oxide ◽  
Carbon Materials ◽  
Device Fabrication ◽  
Organic Reactions ◽  
Bond Forming ◽  
Bond Forming Reactions ◽  
Modern Physics ◽  
Recent Developments ◽  
Optical And Mechanical Properties ◽  
Nitrogen Double Bond

Since Geim and co-workers reported their groundbreaking experiments on graphene, research on graphene oxide (GO) and its derivatives has greatly influenced the field of modern physics, chemistry, device fabrication, material science, and nanotechnology. The unique structure and fascinating properties of these carbon materials can be ascribed to their eminent chemical, electronic, electrochemical, optical, and mechanical properties of GO and its derivatives, particularly compared to other carbon allotropes. The present Review aims to provide an overview on the recent developments in the preparation of GO and its derivatives and their applications in organic reactions. We will first outline the synthesis of GO and its derivatives. Then, we will discuss the major sections about their application as stoichiometric and catalytic oxidants in organic reactions, a particular emphasis on the carbon-carbon, carbon-oxygen, and carbon-nitrogen single bond-forming reactions, as well as carbon-oxygen and carbon-nitrogen double bond-forming reactions. Simultaneously, this Review also describes briefly transition metal supported on GO or its derivatives as a catalyst for organic reaction. Lastly, we will present an outlook of potential areas where GO and its derivatives may be expected to find utility or opportunity for further growth and study.

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