Atomic-scale investigation of the dielectric screening at the interface between silicon and its oxide

2003 ◽  
Vol 786 ◽  
Author(s):  
Feliciano Giustino ◽  
Alfredo Pasquarello
Keyword(s):  
Dielectric Permittivity ◽  
Oxide Thickness ◽  
Atomic Scale ◽  
First Principle ◽  
Equivalent Oxide Thickness ◽  
Gate Stacks ◽  
Si Substrate ◽  
Structural Units ◽  
A Value ◽  
Dielectric Screening

ABSTRACTWe investigate the dielectric screening across the Si-SiO2 interface using a first-principle approach. By determining the profile of the microscopic polarization and the effective polarizabilities of SiOn (n = 0,‥4) structural units, we show that the variation of the local screening across the interface relates to the chemical grading. The oxide region near the Si substrate shows the same dielectric permittivity as bulk SiO2 as long as the oxide is locally stoichiometric. The suboxide region carries an enhanced permittivity, with a value intermediate between those corresponding to bulk Si and SiO2. The implications of these findings for the scalability of the equivalent oxide thickness in high-κ gate stacks are discussed.

Highly Scalable ALD-deposited Hafnium Silicate Gate Stacks for Low Standby Power Applications

2006 ◽  
Vol 917 ◽  
Author(s):  
Johan Swerts ◽  
Wim Deweerd ◽  
Chang-gong Wang ◽  
Yanina Fedorenko ◽  
Annelies Delabie ◽  
...  
Keyword(s):  
Thermal Stability ◽  
Layer Thickness ◽  
Atomic Layer ◽  
Oxide Thickness ◽  
Electrical Performance ◽  
Equivalent Oxide Thickness ◽  
Gate Leakage ◽  
Gate Stacks ◽  
Hafnium Silicate ◽  
Scaling Potential

AbstractThe electrical performance of hafnium silicate (HfSiOx) gate stacks grown by atomic layer deposition (ALD) has been evaluated in capacitors and transistors. First, scaling potential of HfSiOx layers was studied as function of composition and thickness. It is shown that the equivalent oxide thickness scales down with decreasing layer thickness and increasing Hf-content. The gate leakage (at Vfb-1V), however, is mainly determined by the physical layer thickness. For the same equivalent oxide thickness (EOT) target, the lowest leakage is observed for the layers with the highest Hf-content. Leakage values as low as 1x10-3 A/cm2 for an equivalent oxide thickness of 1.3 nm have been obtained. Second, the thermal stability against crystallization of the ALD HfSiOx has been studied and related to their electrical properties. The thermal stability of HfSiOx decreases with increasing Hf-content that necessitates the use of nitridation. The influence of various annealing conditions on the nitrogen incorporation is also studied. Finally, the effect of HfSiOx composition and postdeposition nitridation is discussed on transistor level. TaN metal gate transistor data indicate that nitridation reduces the gate leakage and that Hf-rich HfSiOx layers show the best scaling potential, i.e., highest performance for the lowest gate leakage.

scholarly journals Atomic-scale ferroic HfO2-ZrO2 superlattice gate stack for advanced transistors

2021 ◽  
Author(s):  
Suraj Cheema ◽  
Nirmaan Shanker ◽  
Li-Chen Wang ◽  
Cheng-Hsiang Hsu ◽  
Shang-Lin Hsu ◽  
...  
Keyword(s):  
Leakage Current ◽  
High Performance ◽  
Gate Oxide ◽  
Oxide Thickness ◽  
Atomic Scale ◽  
Oxide Semiconductor ◽  
Operating Voltage ◽  
Gate Stacks ◽  
Gate Stack ◽  
Gate Oxide Thickness

Abstract With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage. This led to the adoption of high-κ dielectric HfO2 in the gate stack in 2008, which remains as the material of choice to date. Here, we report HfO2-ZrO2 superlattice heterostructures as a gate stack, stabilized with mixed ferroelectric-antiferroelectric order, directly integrated onto Si transistors and scaled down to ~ 20 Å, the same gate oxide thickness required for high performance transistors. The overall EOT (equivalent oxide thickness) in metal-oxide-semiconductor capacitors is equivalent to ~ 6.5 Å effective SiO2 thickness, which is, counterintuitively, even smaller than the interfacial SiO2 thickness (8.0-8.5 Å) itself. Such a low effective oxide thickness and the resulting large capacitance cannot be achieved in conventional HfO2-based high-κ dielectric gate stacks without scavenging the interfacial SiO2, which has adverse effects on the electron transport and gate leakage current. Accordingly, our gate stacks, which do not require such scavenging, provide substantially lower leakage current and no mobility degradation. Therefore, our work demonstrates that HfO2-ZrO2 multilayers with competing ferroelectric-antiferroelectric order, stabilized in the 2 nm thickness regime, provides a new path towards advanced gate oxide stacks in electronic devices beyond the conventional HfO2-based high-κ dielectrics.

High Permittivity Oxide Gate Stacks on Silicon Incorporating UHV Silicon Nitride Interfacial Layers

2001 ◽  
Vol 670 ◽  
Author(s):  
Mark A. Shriver ◽  
Ann M. Gabrys ◽  
T. K. Higman ◽  
S. A. Campbell
Keyword(s):  
Oxide Thickness ◽  
Interface State ◽  
Nitride Layer ◽  
State Density ◽  
Interface State Density ◽  
Equivalent Oxide Thickness ◽  
Gate Stacks ◽  
High Permittivity ◽  
Interfacial Layers ◽  
Thermal Nitridation

ABSTRACTCurrent high permittivity material deposition techniques produce a low permittivity oxide interfacial layer consequently increasing the equivalent oxide thickness. This interfacial oxide layer can be prevented by initially growing a thin nitride layer to act as a diffusion barrier. The interfacial nitride layer must also have low interface state densities comparable to state-of-the-art SiO2 insulators in order to be suitable for MOSFETs. The nitride layer used in this study was formed by thermal nitridation in a UHV system, with the subsequent high permittivity deposition done in an adjoining system. After forming capacitors from these films, capacitance vs. voltage (C-V) techniques were used to determine the interface state density and equivalent oxide thickness of the films. Gate stack films were produced on Si(100) and Si(111) and the results are compared. Gate stacks on Si(100) show a slight increase in stretchout in the high frequency C-V curves for both n-type and p-type samples. Initial data suggests that Si(111) has a lower interface state density than the Si(100) gate stacks. This may be attributed to the Si3N4layer on Si(111) being epitaxial nitride.

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