Stress Enhanced Arsenic Diffusion In Titanium Salicided Junctions By Implantation Into C49 TiSi2 and Rapid Thermal Annealing

1999 ◽  
Vol 564 ◽  
Author(s):  
Dong Kyun Sohn ◽  
Ji-Soo Park ◽  
Jong-Uk Bae ◽  
Yun-Jun Hub ◽  
Jin Won Park
Keyword(s):  
Tensile Stress ◽  
Leakage Current ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Chemical Affinity ◽  
Si Substrate ◽  
High Chemical ◽  
Reverse Leakage Current ◽  
Shallow Junctions ◽  
Diffusion Source

AbstractWe studied reverse leakage current in n+/p titanium-salicided shallow junctions using C49 Ti-silicide as a diffusion source. After Ti deposition, rapid thermal annealing (RTA) was performed to form the C49 Ti-silicide. Subsequently, arsenic ions were implanted and a 2nd RTA was carried out at 850 °C to form the low resistivity C54 Ti-silicide. In spite of no drive-in process following the 2nd annealing, the implanted As diffused well into Si substrate and the reverse leakage current of the n+/p junctions was reduced to two orders of magnitude lower. Since the high chemical affinity of As to Ti-silicide trapped the dopant in the silicide, it has been known that Ti or Ti-silicide cannot be used as a diffusion source. However, in this work, we found that the C49 Ti-silicide acted as a diffusion source of As ions. The reason of fast diffusivity is attributed to the generation of high tensile stress induced by As implantation.

Epitaxial Growth and Thermal Stability of CoSi2 Layer on (100) Si from Co-C Films without Capping Layer

1999 ◽  
Vol 564 ◽  
Author(s):  
Hwa Sung Rhee ◽  
Dong Kyun Sohn ◽  
Byung Tae Ahn
Keyword(s):  
Thermal Stability ◽  
Epitaxial Growth ◽  
Leakage Current ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Carbon Film ◽  
Si Substrate ◽  
Capping Layer ◽  
Potential Applicability ◽  
Thermal Stability Of

AbstractA uniform epitaxial CoSi2 layer was grown on (100) Si substrate by rapid thermal annealing at 800°C in N2 ambient without capping layers from an amorphous cobalt-carbon film. The amorphous cobalt-carbon film was deposited on Si substrate by the pyrolysis of cyclopentadienyl dicarbonyl cobalt. Co(η5-C5H5)(CO)2. at 350°C. The leakage current measured on the junction, fabricated with the epitaxial CoSi2 layer and annealed at 1000°C for 30 s. was as low as that of the as-fabricated junction without silicide. indicating that epitaxial (100) CoSi2 is thermally stable at temperatures even above 1000°C and has a potential applicability to the salicide process in sub-half micron devices.

Phosphorus Glass Doping of Polycrystalline Silicon During Rapid Thermal Annealing

1992 ◽  
Vol 283 ◽  
Author(s):  
Bouchaib Hartiti ◽  
Abdelilah Slaoui ◽  
Roland Stuck ◽  
Jean-Claude Muller ◽  
Paul Siffert
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Polycrystalline Silicon ◽  
Glass Film ◽  
Shallow Junctions ◽  
Silicon Materials ◽  
Diffusion Source ◽  
Phosphorus Doped

ABSTRACTWe show that the use of phosphorus doped spin-on glasses as diffusion source is an attractive approach for the formation of shallow junctions in polycrystalline silicon materials. Moreover, this very simple doping process using a glass film can be fruitfully associated to rapid thermal annealing.

Formation of an interface layer between Al1-xSixOythin films and the Si substrate during rapid thermal annealing

2010 ◽  
Vol 7 (2) ◽  
pp. 284-287 ◽  
Author(s):  
Paweł Piotr Michałowski ◽  
Volkhard Beyer ◽  
Malte Czernohorsky ◽  
Peter Kücher ◽  
Steffen Teichert ◽  
...  
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Interface Layer ◽  
Si Substrate

Rapid Thermal Anneaung of Arsenic-Phosphorus(N+-N-) Double-Diffused Shallow Junctions

1985 ◽  
Vol 52 ◽  
Author(s):  
D. L. Kwong ◽  
N. S. Alvi ◽  
Y. H. Ku ◽  
A. W. Cheung
Keyword(s):  
Ion Implantation ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Experimental Results ◽  
Silicon Substrates ◽  
Electrical Characteristics ◽  
Shallow Junctions

ABSTRACTDouble-diffused shallow junctions have been formed by ion implantation of both phosphorus and arsenic ions into silicon substrates and rapid thermal annealing. Experimental results on defect removal, impurity activation and redistribution, effects of Si preamorphization, and electrical characteristics of Ti-silicided junctions are presented.

The Effect of Ternary Material (Zr, Y, and O) High-k Gate Dielectrics

2013 ◽  
Vol 699 ◽  
pp. 422-425 ◽  
Author(s):  
K.C. Lin ◽  
C.H. Chou ◽  
J.Y. Chen ◽  
C.J. Li ◽  
J.Y. Huang ◽  
...  
Keyword(s):  
Surface Roughness ◽  
Electrical Property ◽  
Leakage Current ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Gate Dielectrics ◽  
Bottom Layer ◽  
Oxide Thickness ◽  
Equivalent Oxide Thickness ◽  
High K

In this research, the Y2O3 layer is doped with the zirconium through co-sputtering and rapid thermal annealing (RTA) at 550°C, 700°C, and 850°C. Then the Al electrode is deposited to generate two kinds of structures, Al/ZrN/ Y2O3/ Y2O3+Zr/p-Si and Al/ZrN/ Y2O3+Zr/ Y2O3/p-Si. According to the XRD results, when Zr was doped on the upper layer, the crystallization phenomenon was more significant than Zr was at the bottom layer, meaning that Zr may influence the diffusion of the oxygen. The AFM also shows that the surface roughness of Zr has worse performance. For the electrical property, the influence to overall leakage current is increased because the equivalent oxide thickness (EOT) is thinner.

Rapid Thermal Annealing of Ion Implanted p-n Junction in Silicon

1985 ◽  
Vol 52 ◽  
Author(s):  
C. Ho ◽  
R. Kwor ◽  
C. Araujo ◽  
J. Gelpey
Keyword(s):  
Leakage Current ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Dwell Time ◽  
Annealing Temperature ◽  
Current Analysis ◽  
Junction Depth ◽  
Leakage Currents ◽  
Dopant Activation ◽  
Secondary Ion

ABSTRACTThe rapid thermal annealing (RTA) of p+n and n+p diodes, fabricated by the LOCOS process, and its subsequent effects on junction leakage current, junction depth and dopant activation were investigated. The reverse bias diode leakage currents of implanted Si <100> samples (As+: 60 KeY, 5×1014 5×1015 cm−2, B+: 25 KeV, l×1014, l×1015 cm−2 and BF2+: 45 KeV, 1×1015cm−2 ) were measured as functions of annealing temperature, and dwell time. The annealing was performed using an Eaton RTA system (Nova ROA-400) at temperatures ranging from 950 °C to 1150 °C. Annealing times ranged from 0.2 sec. to 10 sec. The results from the diode leakage current analysis are correlated with those from Secondary Ion Mass Spectroscopy (SIMS) and differential Hall measurements. The reverse-biased leakage currents from the RTA-treated samples are compared with those from furnace-annealed samples.

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