Prevention of Corner Voiding in Selective CVD Deposition of Titanium Silicide on SOI Device

1999 ◽  
Vol 564 ◽  
Author(s):  
Jer-shen Maa ◽  
Bruce Ulrich ◽  
Lisa Stecker ◽  
Greg Stecker ◽  
Sheng Teng Hsu
Keyword(s):  
Flow Rate ◽  
Void Formation ◽  
Drain Current ◽  
Deposition Process ◽  
Open Circuit ◽  
Titanium Silicide ◽  
Deposition Condition ◽  
Soi Devices ◽  
Si Films

AbstractIn the application of selective CVD of titanium silicide to SOI devices, voids were observed at the bottom corner of the spacers, which caused reduction of drain current and in extreme cases formed an open circuit. Test structures were constructed to monitor void formation. It was found the voiding became serious when the thickness of the Si film was reduced. Adjusting the deposition condition by reducing the TiCi4 flow rate or by using a two-step deposition process was able to significantly reduce the chance of void formation. On very thin Si films, voiding can be prevented by depositing a selective Si layer prior to silicide deposition.

Fabrication and Characterization of Anode-Supported SDC Film Electrolyte and its Single Cell

2010 ◽  
Vol 177 ◽  
pp. 407-410
Author(s):  
Xi Bao Li ◽  
Jian Wang ◽  
Xiao Hua Yu ◽  
Hong Xing Gu ◽  
Gang Qin Shao
Keyword(s):  
Single Cell ◽  
Power Density ◽  
Flow Rate ◽  
Current Density ◽  
Tape Casting ◽  
Threshold Value ◽  
Interface Layer ◽  
Open Circuit ◽  
Discharge Performance ◽  
Film Electrolyte

NiO-YSZ (NiO-yttria stabilized zirconia, 3:2, wt.%) and samaria doped ceria (SDC) tapes were prepared by aqueous tape casting. NiO-YSZ anode-supported SDC film electrolyte half-cell was fabricated by laminating and co-sintering at 1400°C for 2 h. The single cell was prepared after LSCF-SDC (lanthanum strontium cobalt ferrite-SDC, 1:1, wt.%) cathode was coated on the electrolyte surface and sintered at 1300 °C for 2 h. The discharge performance of the single cell was tested from 500 °C to 800 °C at different H2 flow rate. Results showed that the relationship between current (I) of and H2 flow rate (ν) was I = 8 × 106 ν. Before reaching the threshold value of H2 flow rate, the current density of single cell increased with the increasing of H2 flow rate. However, the current density did not change with increasing of H2 flow rate over the threshold value. The open circuit voltage (OCV) of single cell at 500°C, 600°C, 700°C, 800°C was 0.978, 0.921, 0.861, 0.803 V, respectively. The maximum power density reached 93.03 mW/cm2 at 800°C. The resistance of interface layer between Ni-YSZ anode and SDC electrolyte was the key impact on the power density.

The effect of a high temperature reaction of Cu-In-Ga metallic precursors on the formation of Cu(In,Ga)(Se,S)2

2013 ◽  
Vol 1538 ◽  
pp. 3-8
Author(s):  
Dominik M. Berg ◽  
Christopher P. Thompson ◽  
William N. Shafarman
Keyword(s):  
High Temperature ◽  
Free Charge Carrier ◽  
Void Formation ◽  
Open Circuit ◽  
Charge Carrier Concentration ◽  
Device Performance ◽  
Defect States ◽  
Formation Reaction ◽  
High Temperature Reaction ◽  
Recombination Processes

ABSTRACTThe influence of higher processing temperatures on the formation reaction of Cu(In,Ga)(Se,S)2 thin films using a three step reactive annealing process and on the device performance has been investigated. High process temperatures generally lead to the formation of larger grains, decrease the amount of void formation and their distribution at the back Mo/Cu(In,Ga)(Se,S)2 interface, and lead to a much faster formation reaction that shortens the overall reaction process. However, high temperature processing also leads to a decrease in device performance. A loss in open circuit voltage and fill factor could be attributed to enhanced interface recombination processes for the samples fabricated at higher process temperatures, which itself may be caused by a lack of Na and subsequent poor passivation of interface defect states. The lack of Na resulted in a decrease in free charge carrier concentration by two orders of magnitude.

Photovoltaic properties of silicon nanocrystals in silicon nitride prepared by ammonia sputtering

2015 ◽  
Vol 08 (05) ◽  
pp. 1550052
Author(s):  
Xiaobo Chen
Keyword(s):  
Silicon Nitride ◽  
Flow Rate ◽  
Photoelectron Spectroscopy ◽  
Silicon Nanocrystals ◽  
Short Circuit ◽  
Short Circuit Current ◽  
Open Circuit ◽  
Photovoltaic Properties ◽  
X Ray ◽  
Xps Characterization

In this work, we present an investigation of the photovoltaic properties of low-temperature (700°C annealing temperature) prepared P -doped Silicon nanocrystals ( Si   NCs ) in silicon nitride by ammonia sputtering followed by rapid thermal annealing (RTA). We examined how the flow rate of NH3influenced the structural properties of the annealed films by using Raman scattering, grazing incidence X-ray diffraction (GI XRD) and transmission electron microscopy (TEM), it was found that the appropriate flow rate of NH3is 3 sccm. For the sample deposited at the flow rate of 3 sccm, TEM image showed that Si   NCs were formed with a mean size about 3.7 nm and the density of ~ 2.1 × 1012cm-2; X-ray photoelectron spectroscopy (XPS) characterization showed the existence of Si – P bonds, indicating effective P doping; the average absorptance of higher than 65% and a significant amount of photocurrent makes it suitable for photoactive. Moreover, the experimental P -doped Si   NCs : Si3N4/ p - Si heterojunction solar cell has been fabricated, and the device performance was studied. The photovoltaic device fabricated exhibits an open-circuit voltage (VOC) and a short-circuit current density (JSC) of 470 mV and 3.25 mA/cm2, respectively.

The Study of Optical and Electrical Properties of a-SiC:H for Multi-junction Si Thin Film Solar Cell

2010 ◽  
Vol 1245 ◽  
Author(s):  
Jenny H. Shim ◽  
W.K. Yoon ◽  
S.T. Hwang ◽  
S.W. Ahn ◽  
H.M. Lee
Keyword(s):  
Solar Cells ◽  
Solar Cell ◽  
High Efficiency ◽  
Open Circuit Voltage ◽  
Defect Density ◽  
Wide Bandgap ◽  
Open Circuit ◽  
Deposition Condition ◽  
Wide Bandgap Material ◽  
Pressure Regime

AbstractStudies have shown that wide bandgap material is required for high efficiency multi-junction solar cell applications. Here, we address proper deposition condition for high quality a-SiC:H films. In high power high pressure regime, we observed that the defect density get much lowered to the similar defect level of a-Si:H film with high H2 dilution. Single junction solar cells fabricated with the optimized condition show high open circuit voltage and low LID effect. The degradation after the LID test was only 13 % reduction of the efficiency indicating that a-SiC:H could be promising material for multi-junction solar cells.

Deposition of Amorphous and Microcrystalline Si,C Alloy Thin Films by a Remote Plasma-Enhanced Chemical-Vapor Deposition Process

1991 ◽  
Vol 219 ◽  
Author(s):  
C. Wang ◽  
G. Lucovsky ◽  
R. J. Nemanich
Keyword(s):  
Raman Spectra ◽  
Chemical Vapor ◽  
Deposition Process ◽  
Degree Of Crystallinity ◽  
Microcrystalline Silicon ◽  
Electrical And Optical Properties ◽  
Silicon Carbon ◽  
Infrared Measurements ◽  
Si Films ◽  
The Degree Of Crystallinity

ABSTRACTWe have extended the remote PECVD process to the deposition of intrinsic and doped, amorphous and microcrystalline silicon, carbon alloy films, a-Si,C:H and μc-Si,C, respectively. The electrical and optical properties of a-Si,C:H deposited by remote PECVD are comparable to those of films deposited by the glow discharge or GD process. The degree of crystallinity in the μc-Si,C alloys, as determined from the relative intensities of crystalline and amorphous features in the Raman spectra, is lower than that of μc-Si films deposited under comparable deposition conditions. The Raman spectra indicate that the crystallites in the μc-Si,C alloys are Si, while the infrared measurements establish that the intervening amorphous component is an a-Si,C:H alloy.

scholarly journals STUDY ON PERFORMANCE OF HYBRID CELL OF DSSC AND PIEZOELECTRIC IN ONE ACTIVE AREA of AZO NANOFIBER SEMICONDUCTOR

2018 ◽  
Vol 80 (3) ◽  
Author(s):  
Syamsul Hadi ◽  
Mirza Yusuf ◽  
Budi Kristiawan ◽  
Atmanto Heru Wibowo ◽  
Suyitno Suyitno
Keyword(s):  
Solar Cells ◽  
Flow Rate ◽  
Open Circuit Voltage ◽  
Hybrid Cell ◽  
Open Circuit ◽  
Hybrid Cells ◽  
As Doping ◽  
Electrospinning Method ◽  
Doped Zno ◽  
Zno Semiconductor

This study aims to explore the possibilities of hybrid cells to convert photon and mechanical energies in a semiconductor area. A device with a hybrid ability was successfully fabricated from AZO (Al doped ZnO) semiconductor nanofibre-based materials by an electrospinning method. The N-719 dye was used to synthesize the semiconductors. The hybrid cell of DSSC and piezoelectric use flowrates of precursor as a measurement parameter on the electrospinning machine which differences of nanofiber diameters were formed on the collector. Furthermore, aluminum as doping material was also applied to ZnO in order to reduce the size of the fibers. When the hybrid cell worked as solar cells based on AZO, an open circuit voltage was produced in the range of 0.421 to 0.507 V. In greater flow of precursors condition, Voc of DSSC will be slightly decreased. On the AZO-based DSSC, the highest Jsc was 1,147 mA/cm2. When the cell worked as a power nano generator, Voc and highest output power of AZO-based cells were 119 mV and 24,8 nW repectively on the flow rate of 2 mL/min.  

Effects of Gas Flow Rate and Catalyst Loading on Polymer Electrolyte Membrane (PEM) Fuel Cell Performance and Degradation

2010 ◽  
Author(s):  
A. Chukwujekwu Okafor ◽  
Hector-Martins Mogbo
Keyword(s):  
Fuel Cell ◽  
Flow Rate ◽  
Gas Flow ◽  
Open Circuit Voltage ◽  
Polymer Electrolyte Membrane ◽  
Open Circuit ◽  
Catalyst Loading ◽  
Gas Flow Rate ◽  
Flow Rates ◽  
Electrolyte Membrane

In this paper, the effects of gas flow rates, and catalyst loading on polymer electrolyte membrane fuel cell (PEMFC) performance was investigated using a 50cm2 active area fuel cell fixture with serpentine flow field channels machined into poco graphite blocks. Membrane Electrode Assemblies (MEAs) with catalyst and gas flow rates at two levels each (0.5mg/cm2, 1mg/cm2; 0.3L/min, 0.5L/min respectively) were tested at 60°C without humidification. The cell performance was analyzed by taking AC Impedance, TAFEL plot, open circuit voltage, and area specific resistance measurements. It was observed that MEAs with lower gas flow rate had lesser cell resistance compared to MEAs with a higher gas flow rate. TAFEL plot shows the highest exchange current density value of −2.05 mAcm2 for MEA with 0.5mg/cm2 catalyst loading operated at reactant gas flow rate of 0.3L/min signifying it had the least activation loss and fastest reaction rate. Open circuit voltage curve shows a higher output voltage and lesser voltage decay rate for MEAs tested at higher gas flow rates.

Efficient Cu(In, Ga)Se2 Based Solar Cells Prepared by Electrodeposition

2003 ◽  
Vol 763 ◽  
Author(s):  
D. Guimard ◽  
N. Bodereau ◽  
J. Kurdi ◽  
J.F. Guillemoles ◽  
D. Lincot ◽  
...  
Keyword(s):  
Band Gap ◽  
Room Temperature ◽  
Open Circuit Voltage ◽  
Spectral Response ◽  
Deposition Process ◽  
Open Circuit ◽  
Response Analysis ◽  
Cell Parameters ◽  
Current Voltage ◽  
Capacitance Voltage

AbstractCuInSe2 and Cu(In, Ga)Se2 precursor layers have been prepared by electrodeposition, with morphologies suitable for device completion. These precursor films were transformed into photovoltaic quality films after thermal annealing without any post-additional vacuum deposition process. Depending on the preparation parameters annealed films with different band gaps between 1eV and 1.5 eV have been prepared. The dependence of resulting solar cell parameters has been investigated. The best efficiency achieved is about 10,2 % for a band gap of 1.45 eV. This device presents an open circuit voltage value of 740 mV, in agreement with the higher band gap value. Device characterisations (current-voltage, capacitance-voltage and spectral response analysis) have been performed. Admittance spectroscopy at room temperature indicates the presence of two acceptor traps at 0.3 and 0.43 eV from the valance band with density of the order of 2. 1017 cm-3 eV-1.

Probing periodic oscillations in a silane dusty plasma in a very high-frequency plasma enhanced chemical vapor deposition process

2014 ◽  
Vol 92 (7/8) ◽  
pp. 744-748 ◽  
Author(s):  
A. Mohan ◽  
C.M. van der Wel ◽  
R.E.I. Schropp ◽  
J.K. Rath
Keyword(s):  
Dusty Plasma ◽  
Hydrogen Plasma ◽  
Dust Cloud ◽  
Void Formation ◽  
Chemical Vapor ◽  
Deposition Process ◽  
Gas Flows ◽  
Very High Frequency ◽  
High Frequency Plasma ◽  
Frequency Plasma

To estimate the dust formation time scale in a silane–hydrogen plasma, optical and electrical plasma diagnostics are performed. We report a periodic fluctuation in emission intensity and electric current in a dusty plasma. The trends of the frequency of fluctuations with varying substrate temperatures and gas flows are studied. However, no such fluctuation is observed in the nondusty plasma. It is hypothesized that this fluctuation arises from the periodic formation and ejection of a dust cloud via the void formation when a critical dust size is reached.

Low Temperature Polycrystalline Si TFTs Fabricated with Directionally Crystallized Si Film

2000 ◽  
Vol 621 ◽  
Author(s):  
Y.H. Jung ◽  
J.M. Yoon ◽  
M.S. Yang ◽  
W.K. Park ◽  
H.S. Soh ◽  
...  
Keyword(s):  
Low Temperature ◽  
Current Flow ◽  
Drain Current ◽  
Directionally Solidified ◽  
Channel Mobility ◽  
Glass Substrates ◽  
Average Grain Size ◽  
Sequential Lateral Solidification ◽  
Si Films ◽  
Channel Region

ABSTRACTThe comparison of TFTs fabricated on films processed by conventional excimer laser an- nealing (ELA) and sequential lateral solidification (SLS) demonstrates the dependence of the device characteristics on the microstructure of the device channel region. We report the perform- ance characteristics of non-self-aligned coplanar n- and p-channel low temperature TFTs fabricated on 1000-Å-thick films on Corning 1737 glass substrates that were directionally solidified using SLS. The devices were aligned so that the grain boundaries were parallel to the direction of the source-drain current flow. These results were compared with those obtained from devices fabricated on conventional ELA-processed polycrystalline Si films (with average grain size of ∼3000 Å) with identical methods. The values for channel mobility obtained from the SLS TFTs are ∼370 cm2/Vsec for n-channel and ∼140 cm2/Vsec for p-channel devices, compared to ∼100 and ∼60 respectively for ELA TFTs. Other device characteristics of SLS TFTs were Ion/Ioff > 107 at Vd=0.1V, and subthreshold slopes less than 0.5V/dec. We further discuss the physical implications of the results and present additional details of the devices.

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