Angle-Resolved Photoemission Study of The Electronic Structures of Auai1 and Ptga2

1998 ◽  
Vol 524 ◽  
Author(s):  
L.-S. Hsu ◽  
J. D. Denlinger ◽  
J. W. Allen
Keyword(s):  
Flat Band ◽  
Gate Oxides ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Depletion Effect ◽  
Polysilicon Films ◽  
Sims Analysis ◽  
Photoemission Study ◽  
Boron Penetration

ABSTRACTIn this work, in-situ doped polysilicon and poly-SiGe films have been used as the gate material for the fabrication of MOS devices to evaluate their respective performances. These films were deposited in an RTCVD system using a Si2H6 and GeH4 gas mixture. MOS capacitors with 45 Å thick gate oxides and polysilicon/poly-SiGe gates were subjected to different anneals to study boron penetration. SIMS analysis and flat band voltage measurements showed much lower boron penetration for devices with poly-SiGe gates than for devices with polysilicon gates. In addition, C-V measurements showed no poly depletion effects for poly-SiGe gates while polysilicon gates had a depletion effect of about 8%. A comparison of resistivities of these films showed a low resistivity of 1 mΩ-cm for poly-SiGe films versus 3 mΩ-cm for polysilicon films after an anneal at 950 °C for 30 seconds.

A Comparison of Mos Devices with In-Situ Boron Doped Polysilicon and Poly Sige Gates Deposited in an Rtcvd System Using S12H6 and B2H6 Gas Mixture

1998 ◽  
Vol 525 ◽  
Author(s):  
M. R. Mirabedini ◽  
V. Z-Q Li ◽  
A. R. Acker ◽  
R. T. Kuehn ◽  
D. Venables ◽  
...  
Keyword(s):  
Flat Band ◽  
Gas Mixture ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Boron Doped ◽  
Depletion Effect ◽  
Polysilicon Films ◽  
Sims Analysis ◽  
Boron Penetration

ABSTRACTIn this work, in-situ doped polysilicon and poly-SiGe films have been used as the gate material for the fabrication of MOS devices to evaluate their respective performances. These films were deposited in an RTCVD system using a Si2H6 and GeH4 gas mixture. MOS capacitors with 45 Å thick gate oxides and polysilicon/poly-SiGe gates were subjected to different anneals to study boron penetration. SIMS analysis and flat band voltage measurements showed much lower boron penetration for devices with poly-SiGe gates than for devices with polysilicon gates. In addition, C-V measurements showed no poly depletion effects for poly-SiGe gates while polysilicon gates had a depletion effect of about 8%. A comparison of resistivities of these films showed a low resistivity of 1 mΩ-cm for poly-SiGe films versus 3 mΩ-cm for polysilicon films after an anneal at 950 °C for 30 seconds.

Influences of Plasma Processed Interface Layers on Germanium MOS Devices with ALD Grown HfO2

2007 ◽  
Vol 996 ◽  
Author(s):  
Takuya Sugawara ◽  
Raghavasimhan Sreenivasan ◽  
Yasuhiro Oshima ◽  
Paul C. McIntyre
Keyword(s):  
Electrical Properties ◽  
Interface Layer ◽  
Hafnium Dioxide ◽  
Passivation Layer ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Interface Layers ◽  
Silicon Based

AbstractGermanium and hafnium-dioxide (HfO2) stack structures' physical and electrical properties were studied based on the comparison of germanium and silicon based metal-oxide-semiconductor (MOS) capacitors' electrical properties. In germanium MOS capacitor with oxide/oxynitride interface layer, larger negative flat-band-voltage (Vfb) shift compared with silicon based MOS capacitors was observed. Secondary ion mass spectrum (SIMS) characteristics of HfO2-germanium stack structure with germanium oxynitride (GeON) interfacial layer showed germanium out diffusion into HfO2. These results indicate that the germanium out diffusion into HfO2 would be the origin of the germanium originated negative Vfb shift. Using Ta3N5 layer as a germanium passivation layer, reduced Vfb shift and negligible hysteresis were observed. These results suggest that the selection of passivation layer strongly influences the electrical properties of germanium based MOS devices.

Evaluation Of 2.0 nm Grown and Deposited Dielectrics in 0.1 μm PMOSFETs

1998 ◽  
Vol 525 ◽  
Author(s):  
A. Srivastava ◽  
H. H. Heinisch ◽  
E. Vogel ◽  
C. Parker ◽  
C. M. Osburn ◽  
...  
Keyword(s):  
Gate Dielectrics ◽  
Electrical Characterization ◽  
Deposition Process ◽  
Gate Oxides ◽  
Boron Doped ◽  
Excellent Control ◽  
Lower Temperature ◽  
Boron Penetration

ABSTRACTThe quality and composition of ultra-thin 2.0 nm gate dielectrics advocated for the 0.1 μm technology regime is expected to significantly impact gate tunneling currents, P+-gate dopant depletion effects and boron penetration into the substrate in PMOSFETs. This paper presents a comparative assessment of alternative grown and deposited gate dielectrics in sub-micron fabricated devices. High quality rapid-thermal CVD oxides and oxynitrides are examined as alternatives to conventional furnace grown gate oxides. An alternative gate process using in-situ boron doped and RTCVD deposited poly-Si is explored. PMOSFETs with Leff down to 0.06 μm were fabricated using a 0.1 μm technology. Electrical characterization of fabricated devices revealed excellent control of gate-boron depletion with the in-situ gate deposition process in all devices. Boron penetration of 2.0 nm gate oxides was effectively controlled by the use of a lower temperature RTA process. The direct tunneling leakage, although significant at these thicknesses, was less than 1 mA/cm2 at Vd = −1.2 V for all dielectrics. MOSFETs with comparable drive currents and excellent junction and off-state leakages were obtained with each dielectric.

The Electrical Characteristics of the MOSCAP Structures with W/WNx/poly Si1−XGeX Gates Stack

2001 ◽  
Vol 670 ◽  
Author(s):  
S.-K. Kang ◽  
J. J. Kim ◽  
D.-H. Ko ◽  
T. H. Ahn ◽  
I. S. Yeo ◽  
...  
Keyword(s):  
Leakage Current ◽  
Low Frequency ◽  
Current Level ◽  
Flat Band ◽  
Electrical Characteristics ◽  
Flat Band Voltage ◽  
Dopant Activation ◽  
Depletion Effect ◽  
Activation Rate ◽  
Boron Penetration

ABSTRACTWe investigated the electrical characteristics of the MOSCAP structures with W/WNx/poly Si1−xGex gates stack using C-V and I-V. The low frequency C-V measurements demonstrated that the flat band voltage of the W/WNx /poly Si0.4Ge0.6 stack was lower than that of W/ WNx /poly Si0.2Ge0.8 stack by 0.3V, and showed less gate-poly-depletion-effect than that of W/ WNx /poly- Si0.2Ge0.8 gates due to the increase of dopant activation rate with the increase of Ge content in the poly Si1−xGex films. As Ge content in poly Si1−xGex increased, the leakage current level increased a little due to the increase of direct tunneling and QBD became higher due to the lower boron penetration.

Study on NO Passivation on the Near Interface Electron and Hole Traps of n-Type 4H-SiC MOS Capacitors by Ultraviolet Light

2018 ◽  
Vol 924 ◽  
pp. 449-452 ◽  
Author(s):  
Yi Fan Jia ◽  
Hong Liang Lv ◽  
Xiao Yan Tang ◽  
Qing Wen Song ◽  
Yi Men Zhang ◽  
...  
Keyword(s):  
Nitric Oxide ◽  
Ultraviolet Light ◽  
Annealed Sample ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Mos Capacitors ◽  
Bias Stress ◽  
Mos Devices ◽  
Capacitance Voltage ◽  
Electron And Hole Traps

The characteristics of near interface electron and hole traps in n-type 4H-SiC MOS capacitors with and without nitric oxide (NO) passivation have been systematically investigated. The hysteresis of the bidirectional capacitance-voltage (C-V) and the shift of flat band voltage (Vfb) caused by bias stress (BS) with and without ultraviolet light (UVL) irradiation are used for studying the influence of near interface electron traps (NIETs) and near interface hole traps (NIHTs). Compared with Ar annealed process, NO passivation can effectively reduce the density of NIETs, but induce excess NIHTs in the SiC MOS devices. What’s worse is that part of the trapped hole cannot be released easily from the NIHTs in the NO annealed sample, which may act as the positive fixed charge and induce the negative shift of threshold voltage.

In situ surface cleaning on a Ge substrate using TMA and MgCp2for HfO2-based gate oxides

2015 ◽  
Vol 3 (19) ◽  
pp. 4852-4858 ◽  
Author(s):  
Il-Kwon Oh ◽  
Kangsik Kim ◽  
Zonghoon Lee ◽  
Jeong-Gyu Song ◽  
Chang Wan Lee ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Surface Cleaning ◽  
Interface Quality ◽  
Gate Oxides ◽  
Mos Devices

Compared to TMA, MgCp2is an effective remover of Ge oxides with a more stable interface quality resulting in better electrical properties of Ge-based MOS devices.

From Radiation Induced Leakage Current to Soft Breakdown in Irradiated MOS Devices With Ultrathin Gate Oxide

1999 ◽  
Vol 592 ◽  
Author(s):  
M. Ceschia ◽  
A. Paccagnella ◽  
A. Cester ◽  
G. Ghidini ◽  
J. Wyss
Keyword(s):  
Leakage Current ◽  
Ion Irradiation ◽  
High Energy ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Radiation Induced ◽  
High Energy Ions ◽  
Soft Breakdown

ABSTRACTMetal Oxide Semiconductor (MOS) capacitors with ultra-thin oxides have been irradiated with ionising particles (8 MeV electrons or Si, Ni, and Ag high energy ions), featuring various Linear Energy Transfer (LET) ranging over 4 orders of magnitude. Different oxide fields (Fbias) were applied during irradiation, ranging between flat-band and 3 MV/cm. We measured the DC Radiation Induced Leakage Current (RILC) at low fields (3-6 MV/cm) after electron or Si ion irradiation. RILC was the highest in devices biased at flat band during irradiation. In devices irradiated with higher LET ions (Ni and Ag) we observed the onset of Soft-Breakdown phenomena. Soft-Breakdown current increases with the oxide field applied during the stress.

Nitrogen Profile Engineering in Thin Gate Oxides

1998 ◽  
Vol 525 ◽  
Author(s):  
J. Kuehne ◽  
S. Hattangady ◽  
J. Piccirillo ◽  
G. C. Xing ◽  
G. Miner ◽  
...  
Keyword(s):  
Nitric Oxide ◽  
Gate Dielectrics ◽  
Depth Profiling ◽  
Gate Oxide ◽  
Gate Oxides ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Boron Penetration ◽  
Silicon Interface ◽  
Voltage Breakdown

ABSTRACTIn order to prevent boron penetration in PMOS transistors without degrading channel mobility, it is necessary to engineer the distribution of nitrogen introduced into the gate oxide. We have investigated methods of engineering this distribution using nitric oxide (NO) gas in an RTP system to thermally nitride ultra-thin gate oxides. In one approach, the gate oxide is simultaneously grown and nitrided in a mixture of nitric oxide and oxygen. For a 40 Å film, SIMS depth profiling shows that this process moves the nitrogen peak into the bulk of the oxide away from the oxide silicon interface. In another approach, an 11 Å chemical oxide produced by a standard pre-furnace wet clean is nitrided in NO at 800 deg. C. This film is subsequently reoxidized in either oxygen or steam. For an 1100 deg. C., 120 sec RTP reoxidation in oxygen, the final film thickness is 41 Å. The nitrogen has a peak concentration of 5 at. % and the peak is located in the oxide 25 Åfrom the oxide/silicon interface. Ramped voltage breakdown testing was carried out on MOS capacitors built using reoxidized NO nitrided films. They have breakdown characteristics that are equivalent to conventional furnace grown oxides. These films show considerable promise as gate dielectrics for CMOS technologies at geometries of 0.25um and below.

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