Low Temperature Formation of C54 TiSi2 Bypassing the C49 Phase: Effect of Si Crystallinity, Metallic Impurities and Applications TO 0.10 μm CMOS

1998 ◽  
Vol 514 ◽  
Author(s):  
J. A. Kittl ◽  
M. A Gribelyuk ◽  
S. B. Samavedam ◽  
Q. Z. Hong ◽  
N. Yu ◽  
...  
Keyword(s):  
Sheet Resistance ◽  
Cmos Technology ◽  
High Resistivity ◽  
Si Substrates ◽  
Early Stages ◽  
Mo Doping ◽  
Large Structures ◽  
Diffusion Limited ◽  
Transmission Electron ◽  
Phase Sequence

ABSTRACTThe mechanism and evolution from the early stages of the Ti/Si reaction by rapid thermal processing (RTP) at 650°C in the presence of Mo doping was studied and compared to the case without Mo doping; for amorphous, polycrystalline and single crystal (100) Si substrates. It was found that for Mo doped polycrystalline Si or Mo doped amorphous Si, the low resitivity C54 TiSi2 phase nucleates at the Ti/Si interface and grows following diffusion limited kinetics, bypassing the nucleation of the high resistivity C49 TiSi2 phase. The conventional phase sequence, with C49 TiSi 2 nucleation and growth, was observed on Mo doped (100) Si and all samples without Mo. The mechanism of early C54 nucleation was identified by high resolution transmission electron microscopy (HRTEM): at early stages of the reaction, precursor silicide phases lattice matched to C54 TiSi2 nucleate at the Ti/Mo doped Si interface, and act as templates for epitaxial nucleation of C54 TiSi2. Two such phases were observed, MoSi2 and a phase with spacings of 2.26 Å and 4.2 Å. Image simulations suggest that the structure of the second template phase is based on Mo5Si3. Similar kinetics were observed on large structures and narrow lines for Mo doped Si (except for the case of (100) Si), indicating that this growth mechanism eliminates the linewidth dependence. Implementation on a 0.10 μm CMOS technology of a process combining Mo doping with pre-amorphization (PAI) achieves low source/drain (S/D) sheet resistance, and the first Ti salicide process with low gate sheet resistance down to 0.06 μm.

Integration of NiSi SALICIDE for Deep Submicron CMOS Technologies

1998 ◽  
Vol 514 ◽  
Author(s):  
X. W. Lin ◽  
N. Ibrahim ◽  
L. Topete ◽  
D. Pramanik
Keyword(s):  
Thin Films ◽  
Single Crystal ◽  
Sheet Resistance ◽  
Thermal Annealing ◽  
Cmos Technology ◽  
Deep Submicron ◽  
Thermal Budget ◽  
Si Substrates ◽  
Low Thermal Budget ◽  
Lower Resistivity

ABSTRACTA NiSi-based self-aligned silicidation (SALICIDE) process has been integrated into a 0.25 Ion CMOS technology. It involves rapid thermal annealing (RTA) of Ni thin films (300, Å thick) on Si substrates in the temperature range ≈400 - 700 °C. It was found that the NiSi sheet resistance (Rs) gradually decreases with decreasing linewidth. Parameters, such as RTA temperature, substrate dopant (As vs BF2) and structure (single crystal vs poly), were found to have little effects on Rs. NiSi forms a smoother interface with single crystalSi than with poly Si, and has a slightly lower resistivity. MOSFETs based on NiSi show comparable device characteristics to those obtained with Ti SALICIDE. Upon thermal annealing, NiSi remains stable at 450 °C for more than 39 hours. The same is true for 500 °C anneals up to 6 hours, except for NiSi narrow lines (<0.5 μm) on n+ poly Si substrates whose Rs is moderately increased after a 6 hr anneal. This work demonstrates that with an appropriate low-thermal budget backend process, NiSi SALICIDE can be a viable process for deep submicron ULSI technologies.

Optimization of Ti and Co Self-Aligned Silicide RTP for 0.10 μm Cmos

1998 ◽  
Vol 525 ◽  
Author(s):  
J. A. Kittl ◽  
Q. Z. Hong ◽  
H. Yang ◽  
N. Yu ◽  
M. Rodder ◽  
...  
Keyword(s):  
Contact Resistance ◽  
Sheet Resistance ◽  
Cmos Technology ◽  
Successful Implementation ◽  
Optimal Process ◽  
Shallow Junction ◽  
Low Resistance ◽  
Mo Doping ◽  
One Step

ABSTRACTAs CMOS technologies are scaled to 0.10 μm and beyond, self-aligned silicide (salicide) processes find difficult challenges. As junction depths and linewidths are scaled, achieving both low sheet resistance and low contact resistance maintaining low diode leakage becomes increasingly difficult. In this paper we present studies of Ti and Co salicide processes implemented into a 0.10 μm CMOS technology. We show that both for Ti and Co, the optimization of RTP parameters plays a crucial roll in achieving a successful implementation. For Co salicide, optimization of RTP conditions results in elimination of shallow junction leakage (its main scaling problem). Two-step RTP and one-step RTP Ti salicide processes are compared, showing the advantages of one-step RTP. The RTP process windows for low resistance narrow gates (the main scaling issue for Ti salicide) are analyzed. Processes with pre-amorphization, with Mo doping and with a combination of both are compared. An optimal process using Mo and preamorphization implants and one-step RTP is shown to result in excellent device characteristics and low resistance to 0.06 μm gates.

Optimization of Ti and Co Self-Aligned Silicide RTP for 0.10 μm CMOS

1998 ◽  
Vol 514 ◽  
Author(s):  
J. A. Kittl ◽  
Q. Z. Hong ◽  
H. Yang ◽  
N. Yu ◽  
M. Rodder ◽  
...  
Keyword(s):  
Contact Resistance ◽  
Sheet Resistance ◽  
Cmos Technology ◽  
Successful Implementation ◽  
Optimal Process ◽  
Shallow Junction ◽  
Low Resistance ◽  
Mo Doping ◽  
One Step

ABSTRACTAs CMOS technologies are scaled to 0.10 μm and beyond, self-aligned silicide (salicide) processes find difficult challenges. As junction depths and linewidths are scaled, achieving both low sheet resistance and low contact resistance maintaining low diode leakage becomes increasingly difficult. In this paper we present studies of Ti and Co salicide processes implemented into a 0.10 μm CMOS technology. We show that both for Ti and Co, the optimization of RTP parameters plays a crucial roll in achieving a successful implementation. For Co salicide, optimization of RTP conditions results in elimination of shallow junction leakage (its main scaling problem). Two-step RTP and one-step RTP Ti salicide processes are compared, showing the advantages of one-step RTP. The RTP process windows for low resistance narrow gates (the main scaling issue for Ti salicide) are analyzed. Processes with pre-amorphization, with Mo doping and with a combination of both are compared. An optimal process using Mo and preamorphization implants and one-step RTP is shown to result in excellent device characteristics and low resistance to 0.06 μm gates.

Formation of Ge Nanocrystals in SiO2 by Electron Beam Evaporation

2008 ◽  
Vol 8 (2) ◽  
pp. 818-822 ◽  
Author(s):  
P. Basa ◽  
G. Molnár ◽  
L. Dobos ◽  
B. Pécz ◽  
L. Tóth ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Electron Beam ◽  
Sheet Resistance ◽  
Electron Beam Evaporation ◽  
Nanocrystal Size ◽  
Cross Sectional ◽  
Si Substrates ◽  
Transmission Electron ◽  
Weber Type ◽  
Ge Nanocrystals

Ge nanocrystals were formed by electron beam evaporation on SiO2 covered Si substrates. The size and distribution of the nanocrystals were studied by atomic force microscopy, scanning electron microscopy and cross-sectional transmission electron microscopy. Dependencies of the nanocrystal size, of the nanocrystal surface coverage, and sheet resistance obtained by van der Pauw method of the Ge layer have been found on the evaporation time. The suggested growth mechanism for the formation of nanocrystals is the Volmer-Weber type. The sheet resistance exhibited a power dependence on the nanocrystal size.

Formation of Palladium Silicide and Germanide in the Pd/a-Si/Si., Pd/a-Ge/Si, and Pd/a-GeSi/Si Systems During Thermal Treatment

1990 ◽  
Vol 205 ◽  
Author(s):  
F. Edelman ◽  
C. Cytermann ◽  
R. Brener ◽  
M. Eizenberg ◽  
R. Weil ◽  
...  
Keyword(s):  
Crystallization Process ◽  
X Ray Diffraction ◽  
Globular Structure ◽  
X Ray ◽  
Si Substrates ◽  
Diffusion Limited ◽  
Transmission Electron ◽  
Palladium Silicide ◽  
Kinetics Of ◽  
Limited Process

AbstractX-ray diffraction and transmission electron microscopy have been used to study the kinetics of phase transformations and the structure of Pd/a-Si, Pd/a-Ge and Pd/a-GeSi thin films deposited on Si substrates. Different kinds of amorphouis structures were used: a-Si:H:D, a-Si.:F, a-Ge:H:D, and a-GeSi:H:D. The first stage of phase transformation during heat treatment was palladium silicide (Pd2Si) and palladium germanide (Pd2Ge) formation at temperatures above 200°C. Annealing studies demonstrated that the presence of F in a-Si promotes the Pd2Si formation. The study of the Pd2Si crystallization process showed that: a) when the Pd layer and the a-Si layer are thin, then c-PdSi grows in a fractal-]ike form; b) when the Pd and a-Si both are thick, then c-Pd2Si grows in a globular structure; c) in both above mentioned cases a well-oriented [0011 texture forms. The growth of the silicide and germanide layers in the temperature range of 200-300°C was found to be controlled by a diffusion limited process. It was found that c-Pd2Ge transforms to c-PdGe above 200°C. The a-Ge,.,Si,. 5 alloy behaved similarly to a-Si forming only [001] textured c-Pd2(Ge,Si).

Effect of Mo Doping on Formation of Ti-Silicide Phases Studied by HRTEM

1998 ◽  
Vol 523 ◽  
Author(s):  
M. A. Gribelyuk ◽  
S. B. Samavedam ◽  
J. A. Kittl
Keyword(s):  
Reaction Path ◽  
Si Substrates ◽  
Mo Doping ◽  
Phase Sequence ◽  
Accelerated Growth ◽  
Induced Reaction

AbstractThe phase sequence of the RTP induced reaction at T=650°C has been studied. We found that pre-amorphization of poly-Si substrates does not change the reaction path. i.e. Ti5Si4, and C-49 TiSi2 phases were formed_ with the latter growing upon further anneal. In the Mo doped poly-Si/Ti system the C-54 TiSi2 phase has formed along with Ti5Si4 and two Mo silicide phases, MoSi2 and Mo5Si3; no C-49 TiSi2 was observed. We show that the reaction in the Mo doped system follows the template mechanism with MoSi2 and Mo5Si3 based phase acting as template phases for accelerated growth of C-54 TiSi2.

Formation of Dislocation Channels in Neutron Irradiated Molybdenum

1972 ◽  
Vol 30 ◽  
pp. 672-673
Author(s):  
S. Mahajan
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Ambient Temperature ◽  
Room Temperature ◽  
Channel Formation ◽  
Early Stages ◽  
Transmission Electron ◽  
Three Stages ◽  
Two Stages ◽  
Polycrystalline Molybdenum

The evolution of dislocation channels in irradiated metals during deformation can be envisaged to occur in three stages: (i) formation of embryonic cluster free regions, (ii) growth of these regions into microscopically observable channels and (iii) termination of their growth due to the accumulation of dislocation damage. The first two stages are particularly intriguing, and we have attempted to follow the early stages of channel formation in polycrystalline molybdenum, irradiated to 5×1019 n. cm−2 (E > 1 Mev) at the reactor ambient temperature (∼ 60°C), using transmission electron microscopy. The irradiated samples were strained, at room temperature, up to the macroscopic yield point.Figure 1 illustrates the early stages of channel formation. The observations suggest that the cluster free regions, such as A, B and C, form in isolated packets, which could subsequently link-up to evolve a channel.

Electron Energy Analysis of Germanium and Silica Layers on Silicon Substrates

1975 ◽  
Vol 33 ◽  
pp. 96-97
Author(s):  
R. W. Ditchfield ◽  
A. G. Cullis
Keyword(s):  
Epitaxial Growth ◽  
Electron Energy ◽  
Silicon Substrates ◽  
Secondary Phases ◽  
Si Substrates ◽  
Transmission Electron ◽  
Layer Structures ◽  
Si Films ◽  
Electron Energy Loss ◽  
Growth Centres

An energy analyzing transmission electron microscope of the Möllenstedt type was used to measure the electron energy loss spectra given by various layer structures to a spatial resolution of 100Å. The technique is an important, method of microanalysis and has been used to identify secondary phases in alloys and impurity particles incorporated into epitaxial Si films.Layers Formed by the Epitaxial Growth of Ge on Si Substrates Following studies of the epitaxial growth of Ge on (111) Si substrates by vacuum evaporation, it was important to investigate the possible mixing of these two elements in the grown layers. These layers consisted of separate growth centres which were often triangular and oriented in the same sense, as shown in Fig. 1.

Influence of MBE Growth Conditions on Dislocation Densities of GaAs/Ge Epilayers Grown on Silicon Substrates

1985 ◽  
Vol 43 ◽  
pp. 364-365
Author(s):  
K.M. Hones ◽  
P. Sheldon ◽  
B.G. Yacobi ◽  
A. Mason
Keyword(s):  
High Efficiency ◽  
Lattice Mismatch ◽  
Low Cost ◽  
Growth Conditions ◽  
Nonradiative Recombination ◽  
Device Structure ◽  
Si Substrates ◽  
Transmission Electron ◽  
Dislocation Densities ◽  
Dislocation Type

There is increasing interest in growing epitaxial GaAs on Si substrates. Such a device structure would allow low-cost substrates to be used for high-efficiency cascade- junction solar cells. However, high-defect densities may result from the large lattice mismatch (∼4%) between the GaAs epilayer and the silicon substrate. These defects can act as nonradiative recombination centers that can degrade the optical and electrical properties of the epitaxially grown GaAs. For this reason, it is important to optimize epilayer growth conditions in order to minimize resulting dislocation densities. The purpose of this paper is to provide an indication of the quality of the epitaxially grown GaAs layers by using transmission electron microscopy (TEM) to examine dislocation type and density as a function of various growth conditions. In this study an intermediate Ge layer was used to avoid nucleation difficulties observed for GaAs growth directly on Si substrates. GaAs/Ge epilayers were grown by molecular beam epitaxy (MBE) on Si substrates in a manner similar to that described previously.

Transmission Electron Microscopy characterization of epitaxial III-V semiconductor thin films grown on Si(100) by ion-assisted deposition

1990 ◽  
Vol 48 (4) ◽  
pp. 686-687
Author(s):  
L. Hultman ◽  
C.-H. Choi ◽  
R. Kaspi ◽  
R. Ai ◽  
S.A. Barnett
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Ion Irradiation ◽  
High Energy ◽  
Nucleation Mechanism ◽  
Layer By Layer ◽  
Extended Defect ◽  
Island Formation ◽  
Si Substrates ◽  
Transmission Electron

III-V semiconductor films nucleate by the Stranski-Krastanov (SK) mechanism on Si substrates. Many of the extended defects present in the films are believed to result from the island formation and coalescence stage of SK growth. We have recently shown that low (-30 eV) energy, high flux (4 ions per deposited atom), Ar ion irradiation during nucleation of III-V semiconductors on Si substrates prolongs the 1ayer-by-layer stage of SK nucleation, leading to a decrease in extended defect densities. Furthermore, the epitaxial temperature was reduced by >100°C due to ion irradiation. The effect of ion bombardment on the nucleation mechanism was explained as being due to ion-induced dissociation of three-dimensional islands and ion-enhanced surface diffusion.For the case of InAs grown at 380°C on Si(100) (11% lattice mismatch), where island formation is expected after ≤ 1 monolayer (ML) during molecular beam epitaxy (MBE), in-situ reflection high-energy electron diffraction (RHEED) showed that 28 eV Ar ion irradiation prolonged the layer-by-layer stage of SK nucleation up to 10 ML. Otherion energies maintained layer-by-layer growth to lesser thicknesses. The ion-induced change in nucleation mechanism resulted in smoother surfaces and improved the crystalline perfection of thicker films as shown by transmission electron microscopy and X-ray rocking curve studies.

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