Thin-Film Transistors Fabricated With Poly-Si Films Crystallized by Microwave Annealing

1998 ◽  
Vol 508 ◽  
Author(s):  
YongWoo Choi ◽  
JeongNo Lee ◽  
TaeWoong Jang ◽  
ByungTae Ahn
Keyword(s):  
Thin Film ◽  
Grain Size ◽  
Thin Film Transistors ◽  
Solid Phase ◽  
Low Cost ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Microwave Annealing ◽  
Si Films ◽  
Better Than

AbstractSolid phase crystallization has the advantages of low cost and excellent uniformity but the crystallization temperature is too high to use glass as a substrate. Using microwave annealing, we crystallized a-Si films at 550 °C within 3 h, which is much shorter than the annealing time at 600 °C of furnace annealing. We fabricated TFTs with poly-Si films crystallized by microwave annealing at low temperature and obtained the characteristics slightly better than or at least comparable to the TFTs by furnace annealing in spite of smaller grain size. This may be due to the improvement of surface roughness of poly-Si film. The poly-Si TFTs with PECVD a-Si film showed better characteristics than the TFTs with LPCVD a-Si film because of larger grain size and smoother Si/SiO2 interface.

Polysilicon Thin Film Transistors

1990 ◽  
Vol 182 ◽  
Author(s):  
Ichio Yudasaka ◽  
Hiroyuki Ohshima
Keyword(s):  
Thin Film ◽  
Thermal Oxidation ◽  
Thin Film Transistors ◽  
Laser Annealing ◽  
Solid Phase ◽  
Solid Phase Crystallization ◽  
Practical Applications ◽  
Polysilicon Film ◽  
Alternative Technologies ◽  
Low Temperature Processing

AbstractPolysilicon thin film transistors are now in mass production. Key factors of the success are thinner polysilicon film and thermal oxidation. Practical applications of polysilicon thin film transistors have been limited, however, because of high temperature processing. Alternative technologies to thermal oxidation are very low pressure deposition, solid-phase crystallization, laser-annealing and hydrogenation. These technologies are compatible with low temperature processing and will contribute to the advance of polysilicon thin film transistors in the future.

Polycrystalline Si Films Fabricated by Low Temperature Selective Nucleation and Solid Phase Epitaxy Process

1997 ◽  
Vol 485 ◽  
Author(s):  
Claudine M. Chen ◽  
Harry A. Atwater
Keyword(s):  
Thin Film ◽  
Grain Size ◽  
Crystal Growth ◽  
Incubation Time ◽  
Solid Phase ◽  
Solid Phase Epitaxy ◽  
Grain Sizes ◽  
Random Nucleation ◽  
Nucleation Sites ◽  
Si Films

AbstractWith a selective nucleation and solid phase epitaxy (SNSPE) process, grain sizes of 10 μm have been achieved to date at 620°C in 100 nrm thick silicon films on amorphous SiO2, with potential for greater grain sizes. Selective nucleation occurs via a thin film reaction between a patterned array of 20 rnm thick indium islands which act as heterogeneous nucleation sites on the amorphous silicon starting material. Crystal growth proceeds by lateral solid phase epitaxy from the nucleation sites, during the incubation time for random nucleation. The largest achievable grain size by SNSPE is thus approximately the product of the incubation time and the solid phase epitaxy rate. Electronic dopants, such as B, P, and Al, are found to enhance the solid phase epitaxy rate and affect the nucleation rate.

Quantum State in Solid-Phase Crystallization of a-Si:H by FA

2010 ◽  
Vol 44-47 ◽  
pp. 4154-4156
Author(s):  
Rui Min Jin ◽  
Ding Zhen Li ◽  
Lan Li Chen ◽  
Xiang Ju Han ◽  
Jing Xiao Lu
Keyword(s):  
Thin Film ◽  
Annealing Temperature ◽  
Solid Phase ◽  
Quantum States ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Conventional Furnace ◽  
Different Temperatures ◽  
Conventional Furnace Annealing ◽  
Electronic Microscope

Amorphous silicon films prepared by PECVD on glass substrate has been crystallized by conventional furnace annealing (FA) at different temperatures. From the Raman spectra and scanning electronic microscope (SEM), it is found that the thin film grain size present quantum states with annealing temperature.

Grain size, Grain Uniformity, and (111) Texture Enhancement by Solid-phase Crystallization of F- and C-implanted SiGe Films

2000 ◽  
Vol 15 (7) ◽  
pp. 1630-1634 ◽  
Author(s):  
A. Rodríguez ◽  
J. Olivares ◽  
C. González ◽  
J. Sangrador ◽  
T. Rodríguez ◽  
...  
Keyword(s):  
Grain Size ◽  
Vapor Deposition ◽  
Solid Phase ◽  
Chemical Vapor ◽  
Solid Phase Crystallization ◽  
Grain Sizes ◽  
Pressure Chemical ◽  
Film Microstructure ◽  
Si Films ◽  
Size Dispersion

The crystallization kinetics and film microstructure of poly-SiGe layers obtained by solid-phase crystallization of unimplanted and C- and F-implanted 100-nm-thick amorphous SiGe films deposited by low-pressure chemical vapor deposition on thermally oxidized Si wafers were studied. After crystallization, the F- and C-implanted SiGe films showed larger grain sizes, both in-plane and perpendicular to the surface of the sample, than the unimplanted SiGe films. Also, the (111) texture was strongly enhanced when compared to the unimplanted SiGe or Si films. The crystallized F-implanted SiGe samples showed the dendrite-shaped grains characteristic of solid-phase crystallized pure Si. The structure of the unimplanted SiGe and C-implanted SiGe samples consisted of a mixture of grains with well-defined contour and a small number of quasi-dendritic grains. These samples also showed a very low grain-size dispersion.

Solid-Phase Crystallization of a-Si:H by RTA

2010 ◽  
Vol 44-47 ◽  
pp. 4151-4153 ◽  
Author(s):  
Rui Min Jin ◽  
Ding Zhen Li ◽  
Lan Li Chen ◽  
Xiang Ju Han ◽  
Jing Xiao Lu
Keyword(s):  
Thin Film ◽  
Grain Size ◽  
Amorphous Silicon ◽  
Glass Substrate ◽  
Solid Phase ◽  
X Ray Diffraction ◽  
Solid Phase Crystallization ◽  
X Ray ◽  
Average Grain Size ◽  
Electronic Microscope

Amorphous silicon films prepared by PECVD on glass substrate has been crystallized by rapid thermal annealing (RTA) at the same temperature for different time. From X-ray diffraction (XRD) and scanning electronic microscope (SEM), it is found that the grain size is biggest crystallized at 720°C for 8 min, an average grain size of 28nm or so is obtained. The thin film is smoothly and perfect structure.

Device Characteristics of a Poly-Silicon Thin Film Transistor Fabricated by Milc at Low Temperature

1996 ◽  
Vol 424 ◽  
Author(s):  
Seok-Woon Lee ◽  
Byung-IL Lee ◽  
Tae-Hyung Ihn ◽  
Tae-Kyung Kim ◽  
Young-Tae Kang ◽  
...  
Keyword(s):  
Thin Film ◽  
High Performance ◽  
Solid Phase ◽  
Thin Film Transistor ◽  
Silicon Thin Film ◽  
Solid Phase Crystallization ◽  
Thin Nickel ◽  
One Step ◽  
Lateral Crystallization ◽  
Si Films

AbstractHigh performance poly-Si thin film transistors were fabricated by using a new crystallization method, Metal-Induced Lateral Crystallization (MILC). The process temperature was kept below 500°C throughout the fabrication. After the gate definition, thin nickel films were deposited on top of the TFT's without an additional mask, and with a one-step annealing at 500°C, the activation of the dopants in source/drain/gate a-Si films was achieved simultaneously with the crystallization of the a-Si films in the channel area. Even without a post-hydrogenation passivation, mobilities of the MILC TFT's were measured to be as high as 120cm2/Vs and 90cm2/Vs for n-channel and p-channel, respectively. These values are much higher than those of the poly-Si TFT's fabricated by conventional solid-phase crystallization at around 6001C.

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